"C:/Users/john/Downloads/jlcpcb-2L" was not found on library.io

msWidth = 4mil            (record minTraceWidth 0.1016 mm = 4 mil)
msDrill = 0.2mm           (record minDrill 0.2 mm)
mdWireWire = 4mil         (record minSpacing 0.1016 mm)
mdPadPad = 0.15mm         (generator: max(spacing, 0.15) pad-to-pad rule)
mdCopperDimension = 0.25mm (record copperToBoardEdge 0.25 mm)
mdDrill = 11mil           (record holeToHole 0.2794 mm = 11 mil)

"errors": 1, "summary total": 3
"Track width (rule 'min-track-width' min width 0.1000 mm; actual 0.0500 mm)"
plus 2 expected "Track has unconnected end" warnings on the stubs

# Verification log

Dated proof that the generated rule files load in real EDA tools.
All checks ran on 2026-09-03.

Note on the requested host: ConfRoomROG was not reachable (only AdomLapper
was connected to the bridge relay, and the jlauerhub cloud has no
ConfRoomROG design). Verification therefore ran on AdomLapper, a real
Windows laptop running Fusion 360 (trial, version current as of 2026-09-03)
with KiCad 10.0 also installed. This substitution is recorded here and on
the page README.

## Fusion 360 electronics (AdomLapper, Fusion 360 trial, 2026-09-03)

Board: ADOM-TEST-R-0402-0R, a real electronics design created by
`fusion_make_test_project` from AdomBasicParts_full.lbr (a placed 0402
resistor on a routed 2-layer board), opened in the PCB Editor.

Files staged with `send_files` to C:/Users/john/Downloads, then loaded with
`fusion_electron_run {"command": "drc load '<path>'"}` (the same command
the bundled `fusion_load_design_rules` uses internally).

| File | drc load result | fusion_alerts |
|---|---|---|
| adom-3rdpartyfab-2L.edru | success | 0 |
| adom-3rdpartyfab-4L.edru | success | 0 |
| jlcpcb-2L.edru | success | 0 |
| jlcpcb-4L.edru | success | 0 |
| pcbway-2L.edru | success | 0 |
| pcbway-4L.edru | success | 0 |

Every load: `success: true`, no dialog appeared, `fusion_alerts` returned
an empty list. Raw add-in responses are quoted below.

### Extension check: Fusion 2026 accepts .edru, rejects .dru

`drc load 'C:/Users/john/Downloads/jlcpcb-2L.dru'` failed with:

```
"C:/Users/john/Downloads/jlcpcb-2L" was not found on library.io
```

Fusion strips the extension and treats the name as a library.io lookup.
The identical command with the `.edru` extension succeeds. Conclusion: on
Fusion 2026 the loadable form is `.edru` (matching the bundled seed files).
The classic EAGLE `.dru` text files are still generated for classic EAGLE
and other tools, not for Fusion's `drc load`.

### Proof the loaded rules became the active DRC set

After loading `pcbway-2L.edru`, the current rules were exported with
`fusion_set_design_rules {"action": "export", "outputPath": ...}` and
pulled back. The active values match the PCBWay 2-layer record:

```
msWidth = 4mil            (record minTraceWidth 0.1016 mm = 4 mil)
msDrill = 0.2mm           (record minDrill 0.2 mm)
mdWireWire = 4mil         (record minSpacing 0.1016 mm)
mdPadPad = 0.15mm         (generator: max(spacing, 0.15) pad-to-pad rule)
mdCopperDimension = 0.25mm (record copperToBoardEdge 0.25 mm)
mdDrill = 11mil           (record holeToHole 0.2794 mm = 11 mil)
```

Screenshot: `fusion-pcb-editor-adom-test-board.png` (the board in the
Fusion PCB Editor after the loads).

## KiCad 10.0 (same laptop, via the kicad bridge)

Test board `ruletest.kicad_pcb`: two stub tracks, one 0.05 mm on net N1,
one 0.3 mm on net N2, in a 50 x 30 mm outline. The generated
`jlcpcb-2L.kicad_dru` was placed beside it as `ruletest.kicad_dru` (KiCad's
project custom-rules naming).

`kicad_lint_board` (headless `kicad-cli pcb drc`) WITH the rules file:

```
"errors": 1, "summary total": 3
"Track width (rule 'min-track-width' min width 0.1000 mm; actual 0.0500 mm)"
plus 2 expected "Track has unconnected end" warnings on the stubs
```

The violation names the custom rule from this page's `.kicad_dru`.

Discriminating control, `ruletest2.kicad_pcb` with a 0.15 mm track:

- WITH `ruletest2.kicad_dru` (jlcpcb-2L rules, min 0.1 mm): 0 errors
  (only the 2 stub warnings).
- WITHOUT the rules file: 1 error, "Track width (board setup constraints
  min width 0.2000 mm; actual 0.1500 mm)".

Same board, same tool, only the `.kicad_dru` present or absent, opposite
outcomes: the generated file is consumed by KiCad's DRC.

`kicad_run_drc` through the bridge on the open board in the KiCad GUI
repeated the result: 0 errors with the rules file in place.
Screenshot: `kicad-pcb-editor-ruletest2.png`.

## Not verified

- Altium `.RUL` import: no Altium install was reachable. The files are
  generated in the classic ASCII design-rules export shape and are marked
  unverified on the README until someone imports one in Altium.
- ConfRoomROG: machine offline on 2026-09-03; the Fusion runs above were
  on AdomLapper instead.
- A hand-written minimal EAGLE .sch/.brd pair did not import through
  `fusion_new_electronics_from_eagle` ("'sch' Open dialog never appeared"
  on this Fusion build), so the verification board came from
  `fusion_make_test_project` instead.