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John Lauer Initial publish: canonical per-vendor PCB fab design rules. 13 vendors, 56 records (vendor, process, layer count) read… bafc3ce 1mo ago
(version 1)

# Seeed Fusion 4-layer design rules (advanced process)
# 
# Min trace width: 0.1016 mm (4.0 mil) - inner layer, 1 oz copper
# Min spacing: 0.1016 mm (4.0 mil) - inner layer, 1 oz copper
# Min drill: 0.1 mm (3.94 mil)
# Min via: 0.1 mm hole / 0.3032 mm pad
# Annular ring: via 0.1016 mm
# Hole to hole: 0.2286 mm
# Copper weight options: 0.5 oz, 1 oz, 2 oz, 3 oz, 4 oz, 5 oz, 6 oz
# Surface finishes: HASL, HASL lead-free, ENIG, Hard Gold, Immersion Tin, Immersion Silver, OSP
# Max board size: n/a x n/a mm
# 
# Inner layer trace/spacing by copper weight: 0.5 oz 3/3 mil (0.0762 mm), 1 oz 4/4 mil (0.1016 mm), 2 oz 5/6 mil (0.127/0.1524 mm), 3 oz 7/9 mil (0.1778/0.2286 mm), 4 oz 8/12 mil (0.2032/0.3048 mm), 5 oz 10/15 mil (0.254/0.381 mm), 6 oz 12/18 mil (0.3048/0.4572 mm). For outer layer values see the 2 layer entry. FR4 1 to 30 layers, rigid-flex up to 36 rigid layers, board thickness rigid 0.2 to 8.0 mm. Back drilling diameter 0.5 to 6.3 mm, depth tolerance 0.10 mm. Min BGA pad diameter 7 mil (0.1778 mm) with 4/4 mil trace/spacing.
# 
# Sources:
# - https://support.seeed.cc/portal/en/kb/articles/fusion-advanced-pcb-specification (read 2026-09-03)

(rule "min-track-width"
  (constraint track_width (min 0.1016mm))
  (layer "*.Cu")
  (condition "A.type == 'track'"))

(rule "min-clearance"
  (constraint clearance (min 0.1016mm))
  (condition "A.type == 'track' && B.type == 'track'"))

(rule "min-hole"
  (constraint hole (min 0.1mm))
  (condition "A.type == 'pad' || A.type == 'via'"))

(rule "min-via-diameter"
  (constraint via_diameter (min 0.3032mm))
  (condition "A.type == 'via'"))