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PCB Design Rules

Public Made by Adom

by adom

Canonical PCB fab design rules (DRC) for every popular vendor: one JSON record per vendor, process and layer count, with generated Fusion/EAGLE .dru and .edru, KiCad .kicad_dru plus board-setup JSON, Altium .RUL exports, and a human comparison table. Every number cites the vendor's own capabilities page and the date it was read.

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pcb-design-rules / kicad / osh-park-4L.kicad_dru
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John Lauer Initial publish: canonical per-vendor PCB fab design rules. 13 vendors, 56 records (vendor, process, layer count) read… bafc3ce 1mo ago
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(version 1)

# OSH Park 4-layer design rules (standard process)
# 
# Min trace width: 0.127 mm (5.0 mil) - 1oz outer, 0.5oz inner copper
# Min spacing: 0.127 mm (5.0 mil) - 1oz outer, 0.5oz inner copper
# Min drill: 0.254 mm (10.0 mil)
# Min via: 0.254 mm hole / 0.4572 mm pad
# Annular ring: via 0.1016 mm
# Copper to board edge: 0.381 mm
# Hole to hole: 0.127 mm
# Board thickness options: 1.6 mm
# Copper weight options: 1 oz
# Surface finishes: ENIG
# Max board size: 406.4 x 558.8 mm
# 
# Copper weight is 1oz outer, 0.5oz inner. Plated drill to internal layer copper clearance 10 mil (0.254mm). Substrate 190Tg FR408-HR. Blind and buried vias not supported. Minimum board size 0.25in (6.35mm) square. Via pad diameter not published.
# 
# Sources:
# - https://docs.oshpark.com/services/four-layer/ (read 2026-09-03)
# - https://docs.oshpark.com/services/ (read 2026-09-03)

(rule "min-track-width"
  (constraint track_width (min 0.127mm))
  (layer "*.Cu")
  (condition "A.type == 'track'"))

(rule "min-clearance"
  (constraint clearance (min 0.127mm))
  (condition "A.type == 'track' && B.type == 'track'"))

(rule "min-hole"
  (constraint hole (min 0.254mm))
  (condition "A.type == 'pad' || A.type == 'via'"))

(rule "min-via-diameter"
  (constraint via_diameter (min 0.4572mm))
  (condition "A.type == 'via'"))

(rule "min-edge-clearance"
  (constraint edge_clearance (min 0.381mm))
  (condition "A.type == 'track'"))

(rule "min-silk-thickness"
  (constraint text_thickness (min 0.127mm))
  (layer "*.SilkS")
  (condition "A.type == 'text' || A.type == 'graphic'"))