skill
PCB Design Rules
Public Made by Adomby adom
Canonical PCB fab design rules (DRC) for every popular vendor: one JSON record per vendor, process and layer count, with generated Fusion/EAGLE .dru and .edru, KiCad .kicad_dru plus board-setup JSON, Altium .RUL exports, and a human comparison table. Every number cites the vendor's own capabilities page and the date it was read.
main
John Lauer
Initial publish: canonical per-vendor PCB fab design rules. 13 vendors, 56 records (vendor, process, layer count) read…
bafc3ce
1mo ago
(version 1)
# NextPCB 2-layer design rules (advanced process)
#
# Min trace width: 0.0635 mm (2.5 mil) - FR4 complex designs, general advanced
# Min spacing: 0.0635 mm (2.5 mil) - FR4 complex designs, general advanced
# Min drill: 0.15 mm (5.91 mil)
# Min via: 0.075 mm hole
# Surface finishes: HASL, Lead Free HASL, ENIG, OSP, Hard Gold, Electrolytic Gold, Gold Fingers, Immersion Tin, Immersion Silver, ENEPIG
# Max board size: 500 x 600 mm
#
# Up to 32 layers, HDI III and any-layer HDI (ELIC). Trace/space by technology: HDI 2.0mil/2.0mil (0.0508mm), heavy copper 3oz 8mil/8mil (0.2032mm), FPC advanced 1.5mil/1.5mil (0.0381mm). Min laser drill microvia 0.075mm, microvia aspect ratio 0.8:1 to 1:1. Min mechanical drill 0.15mm quoted for rigid-flex. Copper up to 10oz outer (heavy copper section) and 4 to 6oz inner; summary banner states up to 6oz outer/4oz inner. Max board size 500x600mm quoted for high-Tg boards. Rigid-flex up to 20 rigid layers plus 8 flex layers. High-speed boards up to 40 layers. Drill aspect ratio up to 20:1. 0.15mm min drill also on rigid-flex section.
#
# Sources:
# - https://www.nextpcb.com/advanced-pcb-manufacturing-capabilities (read 2026-09-03)
(rule "min-track-width"
(constraint track_width (min 0.0635mm))
(layer "*.Cu")
(condition "A.type == 'track'"))
(rule "min-clearance"
(constraint clearance (min 0.0635mm))
(condition "A.type == 'track' && B.type == 'track'"))
(rule "min-hole"
(constraint hole (min 0.15mm))
(condition "A.type == 'pad' || A.type == 'via'"))