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PCB Design Rules

Public Made by Adom

by adom

Canonical PCB fab design rules (DRC) for every popular vendor: one JSON record per vendor, process and layer count, with generated Fusion/EAGLE .dru and .edru, KiCad .kicad_dru plus board-setup JSON, Altium .RUL exports, and a human comparison table. Every number cites the vendor's own capabilities page and the date it was read.

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pcb-design-rules / kicad / macrofab-4L.kicad_dru
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John Lauer Initial publish: canonical per-vendor PCB fab design rules. 13 vendors, 56 records (vendor, process, layer count) read… bafc3ce 1mo ago
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(version 1)

# MacroFab 4-layer design rules (standard process)
# 
# Min trace width: 0.127 mm (5.0 mil) - standard manufacturing specifications
# Min spacing: 0.127 mm (5.0 mil) - standard manufacturing specifications
# Min drill: 0.3048 mm (12.0 mil)
# Min via: 0.3048 mm hole
# Board thickness options: 1.6 mm
# Copper weight options: 0.5 oz, 1 oz
# Surface finishes: ENIG
# Max board size: 378.46 x 378.46 mm
# 
# Same standard specifications as 2-layer; help article does not differentiate by layer count.
# 
# Sources:
# - https://support.macrofab.com/s/article/pcb-specifications-and-drc (read 2026-09-03)

(rule "min-track-width"
  (constraint track_width (min 0.127mm))
  (layer "*.Cu")
  (condition "A.type == 'track'"))

(rule "min-clearance"
  (constraint clearance (min 0.127mm))
  (condition "A.type == 'track' && B.type == 'track'"))

(rule "min-hole"
  (constraint hole (min 0.3048mm))
  (condition "A.type == 'pad' || A.type == 'via'"))