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PCB Design Rules

Public Made by Adom

by adom

Canonical PCB fab design rules (DRC) for every popular vendor: one JSON record per vendor, process and layer count, with generated Fusion/EAGLE .dru and .edru, KiCad .kicad_dru plus board-setup JSON, Altium .RUL exports, and a human comparison table. Every number cites the vendor's own capabilities page and the date it was read.

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pcb-design-rules / kicad / allpcb-advanced-6L.kicad_dru
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John Lauer Initial publish: canonical per-vendor PCB fab design rules. 13 vendors, 56 records (vendor, process, layer count) read… bafc3ce 1mo ago
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(version 1)

# ALLPCB 6-layer design rules (advanced process)
# 
# Min trace width: 0.076 mm (3.0 mil) - 1oz copper
# Min spacing: 0.076 mm (3.0 mil) - 1oz copper
# Min drill: 0.15 mm (5.91 mil)
# Min via: 0.15 mm hole / 0.25 mm pad
# Annular ring: via 0.18 mm
# Copper to board edge: 0.3 mm
# Board thickness options: 0.6 mm, 4.0 mm
# Copper weight options: 1 oz, 2 oz, 3 oz, 4 oz, 5 oz, 6 oz
# Surface finishes: Bare Copper, OSP, HASL With Lead, HASL Lead-free, Immersion Gold, Immersion Tin, Immersion Silver, Nickel Palladium Gold, OSP plus Selective Immersion Gold, Lead-free HASL plus Selective Immersion Gold, Lead-free HASL plus Selective Gold Plating
# Max board size: 630 x 520 mm
# 
# 6 layer board thickness range 0.6 to 4.0mm, differs from 2 and 4 layer range 0.4 to 4.0mm. Other limits as 4 layer entry.
# 
# Sources:
# - https://www.allpcb.com/advanced_pcb_manufacturing_capability.html (read 2026-09-03)

(rule "min-track-width"
  (constraint track_width (min 0.076mm))
  (layer "*.Cu")
  (condition "A.type == 'track'"))

(rule "min-clearance"
  (constraint clearance (min 0.076mm))
  (condition "A.type == 'track' && B.type == 'track'"))

(rule "min-hole"
  (constraint hole (min 0.15mm))
  (condition "A.type == 'pad' || A.type == 'via'"))

(rule "min-via-diameter"
  (constraint via_diameter (min 0.25mm))
  (condition "A.type == 'via'"))

(rule "min-edge-clearance"
  (constraint edge_clearance (min 0.3mm))
  (condition "A.type == 'track'"))

(rule "min-silk-thickness"
  (constraint text_thickness (min 0.1mm))
  (layer "*.SilkS")
  (condition "A.type == 'text' || A.type == 'graphic'"))