PCB Design Rules - kicad/advanced-circuits-4pcb-advanced-standard-4L.kicad_dru

by adom

Canonical PCB fab design rules (DRC) for every popular vendor: one JSON record per vendor, process and layer count, with generated Fusion/EAGLE .dru and .edru, KiCad .kicad_dru plus board-setup JSON, Altium .RUL exports, and a human comparison table. Every number cites the vendor's own capabilities page and the date it was read.

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John Lauer Initial publish: canonical per-vendor PCB fab design rules. 13 vendors, 56 records (vendor, process, layer count) read… bafc3ce 1mo ago

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(version 1)

# Advanced Circuits (4PCB) 4-layer design rules (advanced-standard process)
# 
# Min trace width: 0.1397 mm (5.5 mil) - outer layer, 1 oz Cu base; inner layer 1 oz: 0.1143 mm (4.5 mil); inner 1/2 oz: 0.0889 mm (3.5 mil)
# Min spacing: 0.1397 mm (5.5 mil) - outer layer trace to trace, 1 oz Cu base; inner layer 1 oz: 0.1143 mm (4.5 mil)
# Min drill: 0.1499 mm (5.9 mil)
# Min via: 0.1499 mm hole / 0.5309 mm pad
# Annular ring: via 0.1905 mm
# Copper to board edge: 0.254 mm
# Hole to hole: 0.3048 mm
# Copper weight options: 0.25 oz, 0.375 oz, 0.5 oz, 1 oz, 2 oz, 3 oz, 4 oz
# Max board size: 406.4 x 558.8 mm
# 
# Same capabilities table values as 2 layer; buried vias mechanical drill minimum 0.0059 in (0.1499 mm), blind vias mechanical 0.0059 in, laser drilled blind via minimum 0.004 in (0.1016 mm).
# 
# Sources:
# - https://www.4pcb.com/pcb-capabilities.html (read 2026-09-03)

(rule "min-track-width"
  (constraint track_width (min 0.1397mm))
  (layer "*.Cu")
  (condition "A.type == 'track'"))

(rule "min-clearance"
  (constraint clearance (min 0.1397mm))
  (condition "A.type == 'track' && B.type == 'track'"))

(rule "min-hole"
  (constraint hole (min 0.1499mm))
  (condition "A.type == 'pad' || A.type == 'via'"))

(rule "min-via-diameter"
  (constraint via_diameter (min 0.5309mm))
  (condition "A.type == 'via'"))

(rule "min-edge-clearance"
  (constraint edge_clearance (min 0.254mm))
  (condition "A.type == 'track'"))

(rule "min-silk-thickness"
  (constraint text_thickness (min 0.1016mm))
  (layer "*.SilkS")
  (condition "A.type == 'text' || A.type == 'graphic'"))