PCB Design Rules - fusion/seeed-fusion-advanced-2L.dru

by adom

Canonical PCB fab design rules (DRC) for every popular vendor: one JSON record per vendor, process and layer count, with generated Fusion/EAGLE .dru and .edru, KiCad .kicad_dru plus board-setup JSON, Altium .RUL exports, and a human comparison table. Every number cites the vendor's own capabilities page and the date it was read.

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John Lauer Initial publish: canonical per-vendor PCB fab design rules. 13 vendors, 56 records (vendor, process, layer count) read… bafc3ce 1mo ago

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description[Seeed Fusion 2-layer design rules (advanced process) |  | Min trace width: 0.127 mm (5.0 mil) - outer layer, 1 oz copper | Min spacing: 0.127 mm (5.0 mil) - outer layer, 1 oz copper | Min drill: 0.1 mm (3.94 mil) | Min via: 0.1 mm hole / 0.3032 mm pad | Annular ring: via 0.1016 mm | Hole to hole: 0.2286 mm | Copper weight options: 0.33 oz, 0.5 oz, 1 oz, 2 oz, 3 oz, 4 oz, 5 oz, 6 oz | Surface finishes: HASL, HASL lead-free, ENIG, Hard Gold, Immersion Tin, Immersion Silver, OSP | Max board size: n/a x n/a mm |  | Outer layer trace/spacing by copper weight: 1/3 oz 3/3 mil (0.0762 mm), 0.5 oz 4/4 mil (0.1016 mm), 1 oz 5/5 mil (0.127 mm), 2 oz 6/8 mil (0.1524/0.2032 mm), 3 oz 7/10 mil (0.1778/0.254 mm), 4 oz 8/13 mil (0.2032/0.3302 mm), 5 oz 10/16 mil (0.254/0.4064 mm), 6 oz 12/18 mil (0.3048/0.4572 mm). Board thickness rigid 0.2 to 8.0 mm. Min castellated hole diameter 0.35 mm. Plugged vias finished diameter 0.15 to 0.8 mm. HDI stacks 1+n+1, 1+1+n+1+1, 2+n+2. Outline, V-cut and milling slot tolerance 0.10 mm. Solder mask colors include purple, matte green, customized. Board size limits not published on this page. |  | Sources: | - https://support.seeed.cc/portal/en/kb/articles/fusion-advanced-pcb-specification (read 2026-09-03)]

layerSetup = (1*16)
mtCopper = 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm
mtIsolate = 1.6mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm
mdWireWire = 5.0mil
mdWirePad = 5.0mil
mdWireVia = 5.0mil
mdPadPad = 5.91mil
mdPadVia = 5.0mil
mdViaVia = 5.0mil
mdSmdPad = 5.0mil
mdSmdVia = 5.0mil
mdSmdSmd = 5.0mil
mdCopperDimension = 7.87mil
mdDrill = 9.0mil
msWidth = 5.0mil
msDrill = 3.94mil
mdViaViaSameLayer = 6mil
mdSmdStop = 0mil
msMicroVia = 12mil
msBlindViaRatio = 0.5
rvPadTop = 0
rvPadInner = 0
rvPadBottom = 0
rvViaOuter = 0
rvViaInner = 0
rvMicroViaOuter = 0
rvMicroViaInner = 0
rlMinPadTop = 7.09mil
rlMaxPadTop = 80mil
rlMinPadInner = 7.09mil
rlMaxPadInner = 20mil
rlMinPadBottom = 7.09mil
rlMaxPadBottom = 80mil
rlMinViaOuter = 4.0mil
rlMaxViaOuter = 20mil
rlMinViaInner = 4.0mil
rlMaxViaInner = 20mil
rlMinMicroViaOuter = 4.0mil
rlMaxMicroViaOuter = 20mil
rlMinMicroViaInner = 4.0mil
rlMaxMicroViaInner = 20mil
psTop = -1
psBottom = -1
psFirst = -1
psElongationLong = 100
psElongationOffset = 100
mvStopFrame = 0
mvCreamFrame = 0
mlMinStopFrame = 1.5mil
mlMaxStopFrame = 4mil
mlMinCreamFrame = 0mil
mlMaxCreamFrame = 0mil
mlViaStopLimit = 20mil
srRoundness = 0
srMinRoundness = 0mil
srMaxRoundness = 0mil
slThermalIsolate = 10mil
slThermalsForVias = 0
dpMaxLengthDifference = 400mil
dpGapFactor = 2.5
checkAngle = 0
checkRestrict = 1
checkStop = 0
checkValues = 0
checkNames = 1
checkWireStubs = 1
checkPolygonWidth = 0
useDiameter = 13
maxErrors = 50