skill
PCB Design Rules
Public Made by Adomby adom
Canonical PCB fab design rules (DRC) for every popular vendor: one JSON record per vendor, process and layer count, with generated Fusion/EAGLE .dru and .edru, KiCad .kicad_dru plus board-setup JSON, Altium .RUL exports, and a human comparison table. Every number cites the vendor's own capabilities page and the date it was read.
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John Lauer
Initial publish: canonical per-vendor PCB fab design rules. 13 vendors, 56 records (vendor, process, layer count) read…
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1mo ago
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description[Elecrow 2-layer design rules (standard process) | | Min trace width: 0.1524 mm (6.0 mil) - minimum, recommend greater than 8 mil | Min spacing: 0.1524 mm (6.0 mil) - trace to trace, minimum, recommend greater than 8 mil; pad to pad minimum is 8 mil (0.2032 mm) | Min drill: 0.3 mm (11.81 mil) | Min via: 0.3 mm hole | Board thickness options: 0.6 mm, 0.8 mm, 1.0 mm, 1.2 mm, 1.6 mm, 2.0 mm | Copper weight options: 1 oz, 2 oz | Surface finishes: HASL, HASL Lead Free, ENIG | Max board size: 550 x 550 mm | | Specs apply to regular custom PCB online ordering service, 1 to 8 layers share these limits. Maximum size 55cm x 55cm, minimum board dimension 10mm. Inner layer copper 17um (0.5 oz) or 35um (1 oz). Order form also offers OSP finish, 2.5mm thickness, and min castellated hole 0.60mm. Drill tolerance plated 0.1mm, non-plated 0.05mm. Outline tolerance plus or minus 0.20mm. Min silkscreen text height 0.8mm. | | Sources: | - https://www.elecrow.com/pcb-manufacturing.html (read 2026-09-03)]
layerSetup = (1*16)
mtCopper = 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm
mtIsolate = 1.6mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm
mdWireWire = 6.0mil
mdWirePad = 6.0mil
mdWireVia = 6.0mil
mdPadPad = 6.0mil
mdPadVia = 6.0mil
mdViaVia = 6.0mil
mdSmdPad = 6.0mil
mdSmdVia = 6.0mil
mdSmdSmd = 6.0mil
mdCopperDimension = 7.87mil
mdDrill = 7.87mil
msWidth = 6.0mil
msDrill = 11.81mil
mdViaViaSameLayer = 6mil
mdSmdStop = 0mil
msMicroVia = 12mil
msBlindViaRatio = 0.5
rvPadTop = 0
rvPadInner = 0
rvPadBottom = 0
rvViaOuter = 0
rvViaInner = 0
rvMicroViaOuter = 0
rvMicroViaInner = 0
rlMinPadTop = 7.09mil
rlMaxPadTop = 80mil
rlMinPadInner = 7.09mil
rlMaxPadInner = 20mil
rlMinPadBottom = 7.09mil
rlMaxPadBottom = 80mil
rlMinViaOuter = 3.94mil
rlMaxViaOuter = 20mil
rlMinViaInner = 3.94mil
rlMaxViaInner = 20mil
rlMinMicroViaOuter = 3.94mil
rlMaxMicroViaOuter = 20mil
rlMinMicroViaInner = 3.94mil
rlMaxMicroViaInner = 20mil
psTop = -1
psBottom = -1
psFirst = -1
psElongationLong = 100
psElongationOffset = 100
mvStopFrame = 0
mvCreamFrame = 0
mlMinStopFrame = 1.5mil
mlMaxStopFrame = 4mil
mlMinCreamFrame = 0mil
mlMaxCreamFrame = 0mil
mlViaStopLimit = 20mil
srRoundness = 0
srMinRoundness = 0mil
srMaxRoundness = 0mil
slThermalIsolate = 10mil
slThermalsForVias = 0
dpMaxLengthDifference = 400mil
dpGapFactor = 2.5
checkAngle = 0
checkRestrict = 1
checkStop = 0
checkValues = 0
checkNames = 1
checkWireStubs = 1
checkPolygonWidth = 0
useDiameter = 13
maxErrors = 50