skill
PCB Design Rules
Public Made by Adomby adom
Canonical PCB fab design rules (DRC) for every popular vendor: one JSON record per vendor, process and layer count, with generated Fusion/EAGLE .dru and .edru, KiCad .kicad_dru plus board-setup JSON, Altium .RUL exports, and a human comparison table. Every number cites the vendor's own capabilities page and the date it was read.
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John Lauer
Initial publish: canonical per-vendor PCB fab design rules. 13 vendors, 56 records (vendor, process, layer count) read…
bafc3ce
1mo ago
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description[ALLPCB 2-layer design rules (advanced process) | | Min trace width: 0.076 mm (3.0 mil) - 1oz copper | Min spacing: 0.076 mm (3.0 mil) - 1oz copper | Min drill: 0.15 mm (5.91 mil) | Min via: 0.2 mm hole / 0.5 mm pad | Annular ring: via 0.18 mm | Copper to board edge: 0.3 mm | Board thickness options: 0.4 mm, 4.0 mm | Copper weight options: 1 oz, 2 oz, 3 oz, 4 oz, 5 oz, 6 oz | Surface finishes: Bare Copper, OSP, HASL With Lead, HASL Lead-free, Immersion Gold, Immersion Tin, Immersion Silver, Nickel Palladium Gold, OSP plus Selective Immersion Gold, Lead-free HASL plus Selective Immersion Gold, Lead-free HASL plus Selective Gold Plating | Max board size: 630 x 520 mm | | Double-side board via/pad: 0.2mm inner diameter, 0.5mm outer diameter; outer diameter must be 0.1mm larger than inner, 0.15mm preferred; preferred min via hole 0.2mm. Trace/spacing by copper weight: 1oz 0.076mm, 2oz 0.14mm (5.5118mil), 3oz 0.2mm (7.874mil), 4oz 0.25mm (9.8425mil), 5oz 0.35mm (13.7795mil), 6oz 0.45mm (17.7165mil). Trace width tolerance ±20%. Annular ring: plated DIP holes 1oz recommended 0.2mm, limit 0.18mm; non-plated DIP holes recommended 0.4mm (15.748mil). Min plated slot 0.7mm (27.5591mil), min non-plated slot 0.8mm (31.4961mil). Board thickness to min plated hole ratio 10:1. Plated half hole diameter 0.4mm or more, spacing 0.35mm (13.7795mil). Min single PCB size 10x5mm. Copper to board edge 0.3mm at non-stamp-hole panel areas; V-cut line to copper 0.4mm. Mask sliver recorded from min solder bridge width: green 0.075mm, other colors 0.125mm (4.9213mil). Silk text height 0.75mm (29.5276mil). BGA pad diameter 0.2mm or more. Edge rail 4mm or more. | | Sources: | - https://www.allpcb.com/advanced_pcb_manufacturing_capability.html (read 2026-09-03)]
layerSetup = (1*16)
mtCopper = 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm
mtIsolate = 1.6mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm
mdWireWire = 2.99mil
mdWirePad = 2.99mil
mdWireVia = 2.99mil
mdPadPad = 5.91mil
mdPadVia = 2.99mil
mdViaVia = 2.99mil
mdSmdPad = 2.99mil
mdSmdVia = 2.99mil
mdSmdSmd = 2.99mil
mdCopperDimension = 11.81mil
mdDrill = 7.87mil
msWidth = 2.99mil
msDrill = 5.91mil
mdViaViaSameLayer = 6mil
mdSmdStop = 0mil
msMicroVia = 12mil
msBlindViaRatio = 0.5
rvPadTop = 0
rvPadInner = 0
rvPadBottom = 0
rvViaOuter = 0
rvViaInner = 0
rvMicroViaOuter = 0
rvMicroViaInner = 0
rlMinPadTop = 7.09mil
rlMaxPadTop = 80mil
rlMinPadInner = 7.09mil
rlMaxPadInner = 20mil
rlMinPadBottom = 7.09mil
rlMaxPadBottom = 80mil
rlMinViaOuter = 7.09mil
rlMaxViaOuter = 20mil
rlMinViaInner = 7.09mil
rlMaxViaInner = 20mil
rlMinMicroViaOuter = 7.09mil
rlMaxMicroViaOuter = 20mil
rlMinMicroViaInner = 7.09mil
rlMaxMicroViaInner = 20mil
psTop = -1
psBottom = -1
psFirst = -1
psElongationLong = 100
psElongationOffset = 100
mvStopFrame = 0
mvCreamFrame = 0
mlMinStopFrame = 1.5mil
mlMaxStopFrame = 4mil
mlMinCreamFrame = 0mil
mlMaxCreamFrame = 0mil
mlViaStopLimit = 20mil
srRoundness = 0
srMinRoundness = 0mil
srMaxRoundness = 0mil
slThermalIsolate = 10mil
slThermalsForVias = 0
dpMaxLengthDifference = 400mil
dpGapFactor = 2.5
checkAngle = 0
checkRestrict = 1
checkStop = 0
checkValues = 0
checkNames = 1
checkWireStubs = 1
checkPolygonWidth = 0
useDiameter = 13
maxErrors = 50