PCB Design Rules - fusion/aisler-hasl-2L.dru

by adom

Canonical PCB fab design rules (DRC) for every popular vendor: one JSON record per vendor, process and layer count, with generated Fusion/EAGLE .dru and .edru, KiCad .kicad_dru plus board-setup JSON, Altium .RUL exports, and a human comparison table. Every number cites the vendor's own capabilities page and the date it was read.

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John Lauer Initial publish: canonical per-vendor PCB fab design rules. 13 vendors, 56 records (vendor, process, layer count) read… bafc3ce 1mo ago

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description[Aisler 2-layer design rules (hasl process) |  | Min trace width: 0.2 mm (8.0 mil) - Cu 35um (1oz), HASL finish | Min spacing: 0.15 mm (6.0 mil) - Cu 35um (1oz), HASL finish | Min drill: 0.3 mm (12.0 mil) | Min via: 0.3 mm hole / 0.7 mm pad | Annular ring: via 0.2 mm | Copper to board edge: 0.3 mm | Hole to hole: 0.3 mm | Board thickness options: 1.6 mm | Copper weight options: 1 oz | Surface finishes: HASL | Max board size: 500 x 500 mm |  | Lead-free HASL. Imperial measures are rounded from metric on the source page. Min board dimension greater than 10mm. Via drill range 0.3mm to 0.45mm, drill may be enlarged up to 0.45mm. PTH drill range 0.5mm to 5.6mm, NPTH drill range 0.5mm to 5.6mm. Min NPTH slot 0.8mm, min PTH slot 0.7mm, max PTH slot 2.6mm. Min silkscreen text height 800um (32 mil). Castellated edges not supported with HASL. Green soldermask (Peters Elpemer AS 2467). Via pad diameter not published. |  | Sources: | - https://community.aisler.net/t/2-layer-1-6-mm-35-m-hasl-design-rules/3735 (read 2026-09-03)]

layerSetup = (1*16)
mtCopper = 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm
mtIsolate = 1.6mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm
mdWireWire = 5.91mil
mdWirePad = 5.91mil
mdWireVia = 5.91mil
mdPadPad = 5.91mil
mdPadVia = 5.91mil
mdViaVia = 5.91mil
mdSmdPad = 5.91mil
mdSmdVia = 5.91mil
mdSmdSmd = 5.91mil
mdCopperDimension = 11.81mil
mdDrill = 11.81mil
msWidth = 7.87mil
msDrill = 11.81mil
mdViaViaSameLayer = 6mil
mdSmdStop = 0mil
msMicroVia = 12mil
msBlindViaRatio = 0.5
rvPadTop = 0
rvPadInner = 0
rvPadBottom = 0
rvViaOuter = 0
rvViaInner = 0
rvMicroViaOuter = 0
rvMicroViaInner = 0
rlMinPadTop = 7.09mil
rlMaxPadTop = 80mil
rlMinPadInner = 7.09mil
rlMaxPadInner = 20mil
rlMinPadBottom = 7.09mil
rlMaxPadBottom = 80mil
rlMinViaOuter = 7.87mil
rlMaxViaOuter = 20mil
rlMinViaInner = 7.87mil
rlMaxViaInner = 20mil
rlMinMicroViaOuter = 7.87mil
rlMaxMicroViaOuter = 20mil
rlMinMicroViaInner = 7.87mil
rlMaxMicroViaInner = 20mil
psTop = -1
psBottom = -1
psFirst = -1
psElongationLong = 100
psElongationOffset = 100
mvStopFrame = 0
mvCreamFrame = 0
mlMinStopFrame = 1.5mil
mlMaxStopFrame = 4mil
mlMinCreamFrame = 0mil
mlMaxCreamFrame = 0mil
mlViaStopLimit = 20mil
srRoundness = 0
srMinRoundness = 0mil
srMaxRoundness = 0mil
slThermalIsolate = 10mil
slThermalsForVias = 0
dpMaxLengthDifference = 400mil
dpGapFactor = 2.5
checkAngle = 0
checkRestrict = 1
checkStop = 0
checkValues = 0
checkNames = 1
checkWireStubs = 1
checkPolygonWidth = 0
useDiameter = 13
maxErrors = 50