PCB Design Rules - fusion/advanced-circuits-4pcb-advanced-standard-4L.dru

by adom

Canonical PCB fab design rules (DRC) for every popular vendor: one JSON record per vendor, process and layer count, with generated Fusion/EAGLE .dru and .edru, KiCad .kicad_dru plus board-setup JSON, Altium .RUL exports, and a human comparison table. Every number cites the vendor's own capabilities page and the date it was read.

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John Lauer Initial publish: canonical per-vendor PCB fab design rules. 13 vendors, 56 records (vendor, process, layer count) read… bafc3ce 1mo ago

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description[Advanced Circuits (4PCB) 4-layer design rules (advanced-standard process) |  | Min trace width: 0.1397 mm (5.5 mil) - outer layer, 1 oz Cu base; inner layer 1 oz: 0.1143 mm (4.5 mil); inner 1/2 oz: 0.0889 mm (3.5 mil) | Min spacing: 0.1397 mm (5.5 mil) - outer layer trace to trace, 1 oz Cu base; inner layer 1 oz: 0.1143 mm (4.5 mil) | Min drill: 0.1499 mm (5.9 mil) | Min via: 0.1499 mm hole / 0.5309 mm pad | Annular ring: via 0.1905 mm | Copper to board edge: 0.254 mm | Hole to hole: 0.3048 mm | Copper weight options: 0.25 oz, 0.375 oz, 0.5 oz, 1 oz, 2 oz, 3 oz, 4 oz | Max board size: 406.4 x 558.8 mm |  | Same capabilities table values as 2 layer; buried vias mechanical drill minimum 0.0059 in (0.1499 mm), blind vias mechanical 0.0059 in, laser drilled blind via minimum 0.004 in (0.1016 mm). |  | Sources: | - https://www.4pcb.com/pcb-capabilities.html (read 2026-09-03)]

layerSetup = (1*2*15*16)
mtCopper = 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm
mtIsolate = 1.6mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm
mdWireWire = 5.5mil
mdWirePad = 5.5mil
mdWireVia = 5.5mil
mdPadPad = 5.91mil
mdPadVia = 5.5mil
mdViaVia = 5.5mil
mdSmdPad = 5.5mil
mdSmdVia = 5.5mil
mdSmdSmd = 5.5mil
mdCopperDimension = 10.0mil
mdDrill = 12.0mil
msWidth = 5.5mil
msDrill = 5.9mil
mdViaViaSameLayer = 6mil
mdSmdStop = 0mil
msMicroVia = 12mil
msBlindViaRatio = 0.5
rvPadTop = 0
rvPadInner = 0
rvPadBottom = 0
rvViaOuter = 0
rvViaInner = 0
rvMicroViaOuter = 0
rvMicroViaInner = 0
rlMinPadTop = 7.09mil
rlMaxPadTop = 80mil
rlMinPadInner = 7.09mil
rlMaxPadInner = 20mil
rlMinPadBottom = 7.09mil
rlMaxPadBottom = 80mil
rlMinViaOuter = 7.5mil
rlMaxViaOuter = 20mil
rlMinViaInner = 7.5mil
rlMaxViaInner = 20mil
rlMinMicroViaOuter = 7.5mil
rlMaxMicroViaOuter = 20mil
rlMinMicroViaInner = 7.5mil
rlMaxMicroViaInner = 20mil
psTop = -1
psBottom = -1
psFirst = -1
psElongationLong = 100
psElongationOffset = 100
mvStopFrame = 0
mvCreamFrame = 0
mlMinStopFrame = 1.5mil
mlMaxStopFrame = 4mil
mlMinCreamFrame = 0mil
mlMaxCreamFrame = 0mil
mlViaStopLimit = 20mil
srRoundness = 0
srMinRoundness = 0mil
srMaxRoundness = 0mil
slThermalIsolate = 10mil
slThermalsForVias = 0
dpMaxLengthDifference = 400mil
dpGapFactor = 2.5
checkAngle = 0
checkRestrict = 1
checkStop = 0
checkValues = 0
checkNames = 1
checkWireStubs = 1
checkPolygonWidth = 0
useDiameter = 13
maxErrors = 50