skill
PCB Design Rules
Public Made by Adomby adom
Canonical PCB fab design rules (DRC) for every popular vendor: one JSON record per vendor, process and layer count, with generated Fusion/EAGLE .dru and .edru, KiCad .kicad_dru plus board-setup JSON, Altium .RUL exports, and a human comparison table. Every number cites the vendor's own capabilities page and the date it was read.
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John Lauer
Initial publish: canonical per-vendor PCB fab design rules. 13 vendors, 56 records (vendor, process, layer count) read…
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1mo ago
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description[Advanced Circuits (4PCB) 2-layer design rules (advanced process) | | Min trace width: 0.1016 mm (4.0 mil) - outer layer, 1 oz Cu base; 0.0508 mm (2 mil) at 1/4 and 3/8 oz base, 0.0762 mm (3 mil) at 1/2 oz, 0.1397 mm (5.5 mil) at 2 oz, 0.1905 mm (7.5 mil) at 3 oz; inner 1 oz: 0.0889 mm (3.5 mil) | Min spacing: 0.1016 mm (4.0 mil) - outer layer trace to trace, 1 oz Cu base; 0.0508 mm (2 mil) at 1/4 and 3/8 oz, 0.0635 mm (2.5 mil) at 1/2 oz, 0.1397 mm (5.5 mil) at 2 oz, 0.1905 mm (7.5 mil) at 3 oz | Min drill: 0.127 mm (5.0 mil) | Min via: 0.127 mm hole / 0.508 mm pad | Annular ring: via 0.1905 mm | Copper to board edge: 0.2032 mm | Hole to hole: 0.254 mm | Copper weight options: 0.25 oz, 0.375 oz, 0.5 oz, 1 oz, 2 oz, 3 oz, 4 oz | Max board size: 482.6 x 558.8 mm | | Santa Clara CA, Advanced tier. Max board size 19 x 22 in. Min board thickness 0.008 in (0.2032 mm). PTH tolerance plus or minus 0.002 in (0.0508 mm). Minimum pad 0.01 in (0.254 mm). Min outer layer trace for filled and plated over vias 0.004 in (0.1016 mm). Aspect ratio PTH 12:1. | | Sources: | - https://www.4pcb.com/pcb-capabilities.html (read 2026-09-03)]
layerSetup = (1*16)
mtCopper = 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm
mtIsolate = 1.6mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm
mdWireWire = 4.0mil
mdWirePad = 4.0mil
mdWireVia = 4.0mil
mdPadPad = 5.91mil
mdPadVia = 4.0mil
mdViaVia = 4.0mil
mdSmdPad = 4.0mil
mdSmdVia = 4.0mil
mdSmdSmd = 4.0mil
mdCopperDimension = 8.0mil
mdDrill = 10.0mil
msWidth = 4.0mil
msDrill = 5.0mil
mdViaViaSameLayer = 6mil
mdSmdStop = 0mil
msMicroVia = 12mil
msBlindViaRatio = 0.5
rvPadTop = 0
rvPadInner = 0
rvPadBottom = 0
rvViaOuter = 0
rvViaInner = 0
rvMicroViaOuter = 0
rvMicroViaInner = 0
rlMinPadTop = 7.09mil
rlMaxPadTop = 80mil
rlMinPadInner = 7.09mil
rlMaxPadInner = 20mil
rlMinPadBottom = 7.09mil
rlMaxPadBottom = 80mil
rlMinViaOuter = 7.5mil
rlMaxViaOuter = 20mil
rlMinViaInner = 7.5mil
rlMaxViaInner = 20mil
rlMinMicroViaOuter = 7.5mil
rlMaxMicroViaOuter = 20mil
rlMinMicroViaInner = 7.5mil
rlMaxMicroViaInner = 20mil
psTop = -1
psBottom = -1
psFirst = -1
psElongationLong = 100
psElongationOffset = 100
mvStopFrame = 0
mvCreamFrame = 0
mlMinStopFrame = 1.5mil
mlMaxStopFrame = 4mil
mlMinCreamFrame = 0mil
mlMaxCreamFrame = 0mil
mlViaStopLimit = 20mil
srRoundness = 0
srMinRoundness = 0mil
srMaxRoundness = 0mil
slThermalIsolate = 10mil
slThermalsForVias = 0
dpMaxLengthDifference = 400mil
dpGapFactor = 2.5
checkAngle = 0
checkRestrict = 1
checkStop = 0
checkValues = 0
checkNames = 1
checkWireStubs = 1
checkPolygonWidth = 0
useDiameter = 13
maxErrors = 50