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PCB Design Rules
Public Made by Adomby adom
Canonical PCB fab design rules (DRC) for every popular vendor: one JSON record per vendor, process and layer count, with generated Fusion/EAGLE .dru and .edru, KiCad .kicad_dru plus board-setup JSON, Altium .RUL exports, and a human comparison table. Every number cites the vendor's own capabilities page and the date it was read.
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fusion/adom-instapcb-4L.drudeleted−71@@ -1,71 +0,0 @@-description[3rd party fab 4-layer design rules (standard process) | | Min trace width: 0.09 mm (3.54 mil) - 1 oz copper, multilayer | Min spacing: 0.09 mm (3.54 mil) - 1 oz copper, multilayer, different nets; 3 mil acceptable in BGA fan-outs | Min drill: 0.15 mm (5.91 mil) | Min via: 0.15 mm hole / 0.25 mm pad | Annular ring: via 0.1 mm, pad 0.18 mm | Copper to board edge: 0.2 mm | Hole to hole: 0.2 mm | Drill range: 0.15 mm to 6.3 mm | Board thickness options: 1.6 mm | Copper weight options: 1 oz | | BGA pad diameter >= 0.25 mm. BGA pad to trace clearance min 0.09 mm. Vias can be placed within BGA pads using filled and plated-over vias. | | Sources: | - adom/fusion-bridge addin/AdomBridge/resources/dru/Adom-InstaPCB-4-Layer.edru (read 2026-09-03)]--layerSetup = (1*2*15*16)-mtCopper = 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm-mtIsolate = 1.6mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm-mdWireWire = 3.54mil-mdWirePad = 3.54mil-mdWireVia = 3.54mil-mdPadPad = 5.91mil-mdPadVia = 3.54mil-mdViaVia = 3.54mil-mdSmdPad = 3.54mil-mdSmdVia = 3.54mil-mdSmdSmd = 3.54mil-mdCopperDimension = 7.87mil-mdDrill = 7.87mil-msWidth = 3.54mil-msDrill = 5.91mil-mdViaViaSameLayer = 6mil-mdSmdStop = 0mil-msMicroVia = 12mil-msBlindViaRatio = 0.5-rvPadTop = 0-rvPadInner = 0-rvPadBottom = 0-rvViaOuter = 0-rvViaInner = 0-rvMicroViaOuter = 0-rvMicroViaInner = 0-rlMinPadTop = 7.09mil-rlMaxPadTop = 80mil-rlMinPadInner = 7.09mil-rlMaxPadInner = 20mil-rlMinPadBottom = 7.09mil-rlMaxPadBottom = 80mil-rlMinViaOuter = 3.94mil-rlMaxViaOuter = 20mil-rlMinViaInner = 3.94mil-rlMaxViaInner = 20mil-rlMinMicroViaOuter = 3.94mil-rlMaxMicroViaOuter = 20mil-rlMinMicroViaInner = 3.94mil-rlMaxMicroViaInner = 20mil-psTop = -1-psBottom = -1-psFirst = -1-psElongationLong = 100-psElongationOffset = 100-mvStopFrame = 0-mvCreamFrame = 0-mlMinStopFrame = 1.5mil-mlMaxStopFrame = 4mil-mlMinCreamFrame = 0mil-mlMaxCreamFrame = 0mil-mlViaStopLimit = 20mil-srRoundness = 0-srMinRoundness = 0mil-srMaxRoundness = 0mil-slThermalIsolate = 10mil-slThermalsForVias = 0-dpMaxLengthDifference = 400mil-dpGapFactor = 2.5-checkAngle = 0-checkRestrict = 1-checkStop = 0-checkValues = 0-checkNames = 1-checkWireStubs = 1-checkPolygonWidth = 0-useDiameter = 13-maxErrors = 50