65% MX Keyboard (soldered)
Public Unreviewedby gzc
65% ANSI keyboard PCB (68 soldered MX switches) for a gasket-mount case, rev B: STM32F072 under the spacebar running QMK, USB through a Unified Daughterboard on a Pico-EZmate cable, strict-grid copper, green with lead-free HASL, PCBWay bare board for hand assembly.
| Name | Last updated |
|---|---|
| build | 16h ago |
| design-review | 16h ago |
| docs | 16h ago |
| pcm | 16h ago |
| screenshots | 16h ago |
| steps | 16h ago |
| 65-keyboard-datasheet.pdf | 16h ago |
| 65-keyboard.glb | 16h ago |
| page.json | 16h ago |
| README.md | 16h ago |
65% MX Keyboard (soldered)
A 65% ANSI keyboard main board (68 keys) for a gasket-mount case. The MX switches solder straight into the board, an STM32F072 under the spacebar runs QMK, and USB comes in through a separate USB-C daughterboard on a 4-pin Molex Pico-EZmate cable. The copper is laid out on a strict grid: one straight line per row, one vertical line per column. Made by PCBWay as a bare board and soldered by hand.
Status: revision B, designed and checked, not yet built. The schematic and board match pin for pin (353 of 353), KiCad DRC and ERC are clean (0 errors, 0 unconnected), and the current and heat screen passes. Nothing on this page has been measured on a real board yet.
What changed from rev A: soldered MX switches instead of Kailh hotswap sockets, PCBWay bare board for hand assembly instead of JLCPCB assembly, green mask with lead-free HASL instead of matte black with ENIG. The layout, controller, USB daughterboard and pin map are unchanged.
The back of the board (KiCad render, green mask, lead-free HASL). Every small part is on this side; the switches go in from the front and are soldered here.
At a glance
| Layout | 65% ANSI, 68 keys, 16u x 5u at 19.05 mm pitch |
| Board | 304.8 x 96.75 mm, 2 layers, 1.6 mm, green mask, white silkscreen, lead-free HASL |
| Switches | MX-style, soldered: 5-pin (PCB-mount) or 3-pin (plate-mount), your choice |
| Stabilizers | PCB screw-in (Durock V2): 6.25u Space, 2u Backspace, 2.25u Enter, 2.25u Left Shift |
| Matrix | 5 rows x 15 columns, 1N4148WS (SOD-323) per key, COL2ROW |
| Controller | STM32F072CBT6, crystal-less USB, built-in DFU bootloader |
| Firmware | QMK + VIA/Vial (stm32-dfu) |
| USB | Unified Daughterboard (UDB-C, EZM type) on a 1:1 Pico-EZmate cable into J2 |
| Fab | PCBWay, bare board (no assembly); 0.25 mm tracks, 0.2 mm gaps, well above PCBWay's limits |
| Mounting | 8 x M2 holes kept for now; a gasket case may use none |
Pictures
Back, flat. Each diode sits below its switch, all facing the same way; each row is one straight line.
Front, flat, with the switch 3D models seated. No silkscreen boxes on this side; the column traces show faintly under the mask.
The controller block under the spacebar: J2 (USB cable header), the 3.3 V regulator, the STM32, the BOOT (SW69) and RESET (SW70) buttons, and the test pads, each labelled with its net.
The copper, layer by layer. Back (blue): straight rows, a short hook from each switch pin to its diode, and the 15 columns arriving at the chip as two bundles. Front (red): one vertical column per key column, straight into each switch pin (the pins are plated, so no vias are needed per key).
Adom Fields current and heat screen (simulation, 0.5 A on VBUS and GND): peak 40 A/mm², under 1 °C rise, 0.9 mV ground offset. The "no TVS" tag on J2 is expected: ESD protection lives on the daughterboard. The three low notes left open are listed in the design review.
How the controller spot was chosen (rev A, unchanged): A (by Enter) left no room for the column bundles, so B (under the spacebar) was built.
Building it
- Order: upload the Gerber zip (made from the KiCad project; not published here) to PCBWay: 2 layers, 1.6 mm, green mask, white silkscreen, lead-free HASL, 1 oz copper, no assembly. PCBWay prints an order number on the board unless you pick a location or pay to leave it off.
- Parts: the shopping list has every part with quantities and spares; the order notes list the PCBWay settings. The STM32F072CBT6 had only 32 in stock at JLCPCB/LCSC on 2026-11-09; check stock and buy a spare.
- Solder in this order: the STM32 first (pin 1 dot to the marked corner, drag-solder with lots of flux, check every pin for bridges), then the regulator, capacitors and resistor, the 68 diodes (stripe to the printed bar, all the same way), J2 and the two buttons. Test with the daughterboard (hold BOOT, tap RESET: the PC should see 0483:DF11), then stabilizers, plate and switches last.
- Daughterboard: a Unified Daughterboard of the EZM (Pico-EZmate) type with its 1:1 cable: pin 1 VBUS, 2 D-, 3 D+, 4 GND. The main board has no ESD or fuse of its own; the daughterboard carries them.
- QMK pins:
MATRIX_ROW_PINS { PB9, PB6, PB4, PA15, PB3 },MATRIX_COL_PINS { PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PB0, PB1, PB2, PB10, PB11, PB12, PB13 },DIODE_DIRECTION COL2ROW. - Debug: SWD on the test pads: 3V3, SWDIO, SWCLK, NRST, GND (plus VBUS and BOOT0).
Design review and datasheet
- Design review: the current and heat tables, the screens' verdicts and the parts table.
- Datasheet (PDF): operating envelope, pinout, power, mechanical and fab details, hand assembly and the qualification limits. It is at the bottom of this page too.
Components
| References | Qty | Value | MPN | Manufacturer | Wiki page |
|---|---|---|---|---|---|
| J2 | 1 | Pico-EZmate 4P | 78171-0004 | Molex | project library (no public page yet) |
| U3 | 1 | AP2112K-3.3 | AP2112K-3.3TRG1 | Diodes Incorporated | adom/ap2112k-3-3trg1 |
| C1, C2, C8 | 3 | 1uF | CL10A105KB8NNNC | Samsung Electro-Mechanics | project library (no public page yet) |
| U1 | 1 | STM32F072CBT6 | STM32F072CBT6 | STMicroelectronics | adom/stm32f072cbt6 |
| C3, C4, C5, C6, C10 | 5 | 100nF | CC0603KRX7R9BB104 | YAGEO | glenn/cc0603krx7r9bb104 |
| C7 | 1 | 4.7uF | CL10A475KO8NNNC | Samsung Electro-Mechanics | adom/cl10a475ko8nnnc |
| C9 | 1 | 10nF | 0603B103K500NT | FH (Guangdong Fenghua) | project library (no public page yet) |
| R3 | 1 | 10k | 0603WAF1002T5E | UNI-ROYAL | adom/0603waf1002t5e |
| SW69, SW70 | 2 | BOOT | TS-1187A-B-A-B | XKB Connection | adom/ts-1187a-b-a-b |
| SW1, SW2, SW3, SW4, SW5, SW6, SW7, SW8, SW9, SW10, SW11, SW12, SW13, SW14, SW15, SW16, SW17, SW18, SW19, SW20, SW21, SW22, SW23, SW24, SW25, SW26, SW27, SW28, SW29, SW30, SW31, SW32, SW33, SW34, SW35, SW36, SW37, SW38, SW39, SW40, SW41, SW42, SW43, SW44, SW45, SW46, SW47, SW48, SW49, SW50, SW51, SW52, SW53, SW54, SW55, SW56, SW57, SW58, SW59, SW60, SW61, SW62, SW63, SW64, SW65, SW66, SW67, SW68 | 68 | MX_SWITCH | MX switch, 5-pin or 3-pin (user-supplied) | any MX-compatible (your choice) | not on the wiki yet |
| D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11, D12, D13, D14, D15, D16, D17, D18, D19, D20, D21, D22, D23, D24, D25, D26, D27, D28, D29, D30, D31, D32, D33, D34, D35, D36, D37, D38, D39, D40, D41, D42, D43, D44, D45, D46, D47, D48, D49, D50, D51, D52, D53, D54, D55, D56, D57, D58, D59, D60, D61, D62, D63, D64, D65, D66, D67, D68 | 68 | 1N4148WS | 1N4148WS | onsemi | project library (no public page yet) |
Install every part in KiCad
This page is a KiCad Plugin and Content Manager repository. In KiCad, open Plugin and Content Manager, Manage..., add this URL, then install 65% MX keyboard (soldered), rev B from the Libraries tab:
https://wiki.adom.inc/api/pages/gzc/65-keyboard/files/pcm/repository.json
The library appears as PCM_65-keyboard (package inc.adom.wiki.gzc.65-keyboard): every symbol, footprint and 3D model of this board, from the parts' wiki pages.
How this board was built
Every step of the build, in order, each with its own page of evidence (checks, screenshots, the AI's drawings and usage), written by adom-aiflow as the run went.
2. Design rules: choose the fab, load its design rules. The evidence
3. Components: wiki component identity and CAD audit. The evidence
4. Libraries: the project library in the EDA. The evidence
5. 3D models: every 3D model bound and upright. The evidence
6. Test plan: what to measure on the workcell, a probe spot for each. The evidence
7. Placement: parts placed for current and heat. The evidence
8. Routing: every trace routed, DRC clean. The evidence
9. Heatsink vias: via arrays under the hot parts. The evidence
10. Copper pours: copper pours and stitching. The evidence
11. Rounded corners: sharp board corners rounded. The evidence
12. Current: current density on every loaded net. The evidence
13. Thermal: temperature rise against the budget. The evidence
14. Fields: current and heat solved in 3D. The evidence
15. Pour walkthrough: each pour net lit in turn. The evidence
16. Silkscreen: labels, polarity, pinouts, both faces. The evidence
17. 3D board: the finished board in 3D. The evidence
18. Finish line: 0 unconnected, 0 errors, every check passed. The evidence
19. Gerbers, BOM, CPL: manufacturing files written and checked. The evidence