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STM32F072CBT6

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

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Symbol & Footprint

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Datasheet

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Contents

README

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STM32F072CBT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

STM32F072CBT6 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup power supply (1.65 V to 3.6 V). Powers the RTC, LSE and backup registers when VDD is off.
2 PC13 bidirectional General-purpose I/O in the RTC/backup domain. Additional functions: WKUP2, RTC_TAMP1, RTC_TS, RTC_OUT. TC I/O structure; limited drive (max 3 mA, max 2 MHz).
3 PC14-OSC32_IN bidirectional GPIO PC14, additional function OSC32_IN (LSE 32.768 kHz crystal input). TC I/O structure; same drive restrictions as PC13.
4 PC15-OSC32_OUT bidirectional GPIO PC15, additional function OSC32_OUT (LSE 32.768 kHz crystal output). TC I/O structure; same drive restrictions as PC13.
5 PF0-OSC_IN bidirectional GPIO PF0, additional function OSC_IN (HSE 4-32 MHz crystal input). Alternate function: CRS_SYNC. FT (5 V tolerant) I/O.
6 PF1-OSC_OUT bidirectional GPIO PF1, additional function OSC_OUT (HSE 4-32 MHz crystal output). FT (5 V tolerant) I/O.
7 NRST bidirectional Device reset input / internal reset output, active low. Bidirectional with embedded weak pull-up resistor.
8 VSSA power_in Analog ground reference for the ADC, DAC, comparators and internal reference. Connect to system ground.
9 VDDA power_in Analog power supply for ADC, DAC, comparators, PLL and internal reference. 2.4 V to 3.6 V; must be >= VDD.
10 PA0 bidirectional GPIO PA0 (TTa I/O). Alt: USART2_CTS, TIM2_CH1_ETR, COMP1_OUT, TSC_G1_IO1, USART4_TX. Additional: RTC_TAMP2, WKUP1, ADC_IN0, COMP1_INM6.
11 PA1 bidirectional GPIO PA1 (TTa I/O). Alt: USART2_RTS, TIM2_CH2, TIM15_CH1N, TSC_G1_IO2, USART4_RX, EVENTOUT. Additional: ADC_IN1, COMP1_INP.
12 PA2 bidirectional GPIO PA2 (TTa I/O). Alt: USART2_TX, COMP2_OUT, TIM2_CH3, TIM15_CH1, TSC_G1_IO3. Additional: ADC_IN2, COMP2_INM6, WKUP4.
13 PA3 bidirectional GPIO PA3 (TTa I/O). Alt: USART2_RX, TIM2_CH4, TIM15_CH2, TSC_G1_IO4. Additional: ADC_IN3, COMP2_INP.
14 PA4 bidirectional GPIO PA4 (TTa I/O). Alt: SPI1_NSS, I2S1_WS, TIM14_CH1, TSC_G2_IO1, USART2_CK. Additional: COMP1_INM4, COMP2_INM4, ADC_IN4, DAC_OUT1.
15 PA5 bidirectional GPIO PA5 (TTa I/O). Alt: SPI1_SCK, I2S1_CK, CEC, TIM2_CH1_ETR, TSC_G2_IO2. Additional: COMP1_INM5, COMP2_INM5, ADC_IN5, DAC_OUT2.
16 PA6 bidirectional GPIO PA6 (TTa I/O). Alt: SPI1_MISO, I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1, COMP1_OUT, TSC_G2_IO3, EVENTOUT, USART3_CTS. Additional: ADC_IN6.
17 PA7 bidirectional GPIO PA7 (TTa I/O). Alt: SPI1_MOSI, I2S1_SD, TIM3_CH2, TIM14_CH1, TIM1_CH1N, TIM17_CH1, COMP2_OUT, TSC_G2_IO4, EVENTOUT. Additional: ADC_IN7.
18 PB0 bidirectional GPIO PB0 (TTa I/O). Alt: TIM3_CH3, TIM1_CH2N, TSC_G3_IO2, EVENTOUT, USART3_CK. Additional: ADC_IN8.
19 PB1 bidirectional GPIO PB1 (TTa I/O). Alt: TIM3_CH4, USART3_RTS, TIM14_CH1, TIM1_CH3N, TSC_G3_IO3. Additional: ADC_IN9.
20 PB2 bidirectional GPIO PB2 (FT 5 V tolerant I/O). Alt: TSC_G3_IO4.
21 PB10 bidirectional GPIO PB10 (FT). Alt: SPI2_SCK, I2C2_SCL, USART3_TX, CEC, TSC_SYNC, TIM2_CH3. Supports I2C/SPI/UART muxing.
22 PB11 bidirectional GPIO PB11 (FT). Alt: USART3_RX, TIM2_CH4, EVENTOUT, TSC_G6_IO1, I2C2_SDA.
23 VSS power_in Digital ground. Connect to system ground.
24 VDD power_in Digital power supply (2.0 V to 3.6 V). Decouple with a 100 nF cap close to the pin.
25 PB12 bidirectional GPIO PB12 (FT). Alt: TIM1_BKIN, TIM15_BKIN, SPI2_NSS, I2S2_WS, USART3_CK, TSC_G6_IO2, EVENTOUT.
26 PB13 bidirectional GPIO PB13 (FTf, Fast-Mode Plus I2C tolerant). Alt: SPI2_SCK, I2S2_CK, I2C2_SCL, USART3_CTS, TIM1_CH1N, TSC_G6_IO3.
27 PB14 bidirectional GPIO PB14 (FTf). Alt: SPI2_MISO, I2S2_MCK, I2C2_SDA, USART3_RTS, TIM1_CH2N, TIM15_CH1, TSC_G6_IO4.
28 PB15 bidirectional GPIO PB15 (FT). Alt: SPI2_MOSI, I2S2_SD, TIM1_CH3N, TIM15_CH1N, TIM15_CH2. Additional: WKUP7, RTC_REFIN.
29 PA8 bidirectional GPIO PA8 (FT). Alt: USART1_CK, TIM1_CH1, EVENTOUT, MCO, CRS_SYNC. Supplied by VDDIO2.
30 PA9 bidirectional GPIO PA9 (FT). Alt: USART1_TX, TIM1_CH2, TIM15_BKIN, TSC_G4_IO1. Supplied by VDDIO2.
31 PA10 bidirectional GPIO PA10 (FT). Alt: USART1_RX, TIM1_CH3, TIM17_BKIN, TSC_G4_IO2. Supplied by VDDIO2.
32 PA11 bidirectional GPIO PA11 (FT). Alt: CAN_RX, USART1_CTS, TIM1_CH4, COMP1_OUT, TSC_G4_IO3, EVENTOUT. Additional: USB_DM (USB 2.0 full-speed data-minus). Supplied by VDDIO2.
33 PA12 bidirectional GPIO PA12 (FT). Alt: CAN_TX, USART1_RTS, TIM1_ETR, COMP2_OUT, TSC_G4_IO4, EVENTOUT. Additional: USB_DP (USB 2.0 full-speed data-plus). Supplied by VDDIO2.
34 PA13 bidirectional GPIO PA13 (FT). Default after reset: SWDIO with internal pull-up. Alt: IR_OUT, SWDIO, USB_NOE. Supplied by VDDIO2.
35 VSS power_in Digital ground. Connect to system ground.
36 VDDIO2 power_in Independent digital I/O supply (1.65 V to 3.6 V) for the PA8-PA15 and PC10-PC12/PD0-PD2 group. Enables level shifting to a lower/higher rail than VDD.
37 PA14 bidirectional GPIO PA14 (FT). Default after reset: SWCLK with internal pull-down. Alt: USART2_TX, SWCLK. Supplied by VDDIO2.
38 PA15 bidirectional GPIO PA15 (FT). Alt: SPI1_NSS, I2S1_WS, USART2_RX, USART4_RTS, TIM2_CH1_ETR, EVENTOUT. Supplied by VDDIO2.
39 PB3 bidirectional GPIO PB3 (FT). Alt: SPI1_SCK, I2S1_CK, TIM2_CH2, TSC_G5_IO1, EVENTOUT.
40 PB4 bidirectional GPIO PB4 (FT). Alt: SPI1_MISO, I2S1_MCK, TIM17_BKIN, TIM3_CH1, TSC_G5_IO2, EVENTOUT.
41 PB5 bidirectional GPIO PB5 (FT). Alt: SPI1_MOSI, I2S1_SD, I2C1_SMBA, TIM16_BKIN, TIM3_CH2. Additional: WKUP6.
42 PB6 bidirectional GPIO PB6 (FTf, Fast-Mode Plus I2C). Alt: I2C1_SCL, USART1_TX, TIM16_CH1N, TSC_G5_IO3. Supports 1 Mbit/s I2C with 20 mA current sink.
43 PB7 bidirectional GPIO PB7 (FTf). Alt: I2C1_SDA, USART1_RX, USART4_CTS, TIM17_CH1N, TSC_G5_IO4.
44 BOOT0 input Boot memory selection input (dedicated B-type pin). High selects system-memory / user-defined bootloader at reset; low selects main Flash.
45 PB8 bidirectional GPIO PB8 (FTf). Alt: I2C1_SCL, CEC, TIM16_CH1, TSC_SYNC, CAN_RX.
46 PB9 bidirectional GPIO PB9 (FTf). Alt: SPI2_NSS, I2S2_WS, I2C1_SDA, IR_OUT, TIM17_CH1, EVENTOUT, CAN_TX.
47 VSS power_in Digital ground. Connect to system ground.
48 VDD power_in Digital power supply (2.0 V to 3.6 V). Decouple with a 100 nF cap close to the pin.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-48(7x7)
Category MCU
Pins 48

Ordering variants

Same part, different packaging or reel option.

  • STM32F072CBT6
  • STM32F072CBT7
  • STM32F072C8T6
  • STM32F072C8T7
  • STM32F072CBU6
  • STM32F072CBU7
  • STM32F072C8U6
  • STM32F072C8U7
  • STM32F072CBY6
  • STM32F072C8Y6
  • STM32F072RBT6
  • STM32F072RBT7
  • STM32F072R8T6
  • STM32F072R8T7
  • STM32F072RBH6
  • STM32F072R8H6
  • STM32F072VBT6
  • STM32F072VBT7
  • STM32F072V8T6
  • STM32F072V8T7
  • STM32F072VBH6
  • STM32F072V8H6

CAD (KiCad official)

  • Symbol: STM32F072CBT6
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm32f072cbt6-etched.step / stm32f072cbt6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f072cbt6.step / stm32f072cbt6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (128 pp, sha256 3944f06084804cd1, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF