main
Ray footprint: the shipped SOIC-8 has no thermal pad, but the symbol and the datasheet both show 9 pads. datasheet EP 2.29x3.1mm, nearest land 2.29x3.0mm (delta 0.10mm). Chosen from this part's OWN datasheet, not inferred from a sibling - the Richtek SOP-8-EP parts alone carry three different exposed-pad sizes, so family inference would have been wrong. Rebuilds the .lbr, re-derives pin 1 and pads.json. eb29062 1mo ago
{
 "schema": "adom.pads/1",
 "slug": "xl7026e1",
 "footprint": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm",
 "generated_from": {
  "footprint": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm@sha256:a7971720bdda0353",
  "pins": "page.json:component.pins",
  "overrides": null
 },
 "pin1": {
  "pad": "1",
  "at": [
   -2.475,
   -1.905
  ],
  "corner": "top-left",
  "source": "silk-marker",
  "derived_from": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm@sha256:a7971720bdda0353"
 },
 "pad_count": 9,
 "symbol_pins": [
  "1",
  "2",
  "3",
  "4",
  "5",
  "6",
  "7",
  "8",
  "9"
 ],
 "paste_apertures": 4,
 "issues": [],
 "pads": [
  {
   "pad": "1",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "1",
   "name": "FB",
   "type": "input",
   "description": "Feedback pin. Sensed against the internal 1.25 V reference through an external resistor divider from VOUT to set the output voltage (VOUT = 1.25 * (1 + R2/R1)).",
   "is_pin1": true,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "2",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "2",
   "name": "VREG",
   "type": "power_in",
   "description": "Chip supply pin. Requires a 10 µF decoupling capacitor between VREG and GND to filter noise. An external 7-9 V bias can be applied to this pin to reduce internal power dissipation.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "3",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "3",
   "name": "VC",
   "type": "passive",
   "description": "Internal voltage-regulator bypass pin. Requires a 1 µF ceramic capacitor connected between VC and VIN.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "4",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "4",
   "name": "VIN",
   "type": "power_in",
   "description": "Main power input, DC 12-90 V (demo tested up to 84 V). Bypass to GND with an electrolytic capacitor placed close to the pin to suppress switching noise and inrush spikes.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "5",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "5",
   "name": "SW",
   "type": "power_out",
   "description": "Power-switch output pin. Connects to the external inductor and freewheeling Schottky diode of the buck converter. Tied together with pin 6 for current handling.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "6",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "6",
   "name": "SW",
   "type": "power_out",
   "description": "Power-switch output pin (paralleled with pin 5). Connects to the switching node of the buck converter.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "7",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "7",
   "name": "OGND",
   "type": "power_in",
   "description": "Power/output ground return for the internal power stage. Tie to the ground plane at the input capacitor return.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "8",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "8",
   "name": "GND",
   "type": "power_in",
   "description": "Signal ground reference for the control circuitry.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "9",
   "kind": "smd",
   "shape": "rect",
   "at": [
    0.0,
    0.0
   ],
   "rot": 0.0,
   "size": [
    2.29,
    3.0
   ],
   "layers": [],
   "thermal": true,
   "pin": "9",
   "name": "EP",
   "type": "power_in",
   "description": "Exposed thermal pad on the bottom of the SOP8-EP package. Solder to the ground copper pour for heat sinking; connect to GND.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  }
 ]
}