skill
PCB Design Rules
Public Made by Adomby adom
Canonical PCB fab design rules (DRC) for every popular vendor: one JSON record per vendor, process and layer count, with generated Fusion/EAGLE .dru and .edru, KiCad .kicad_dru plus board-setup JSON, Altium .RUL exports, and a human comparison table. Every number cites the vendor's own capabilities page and the date it was read.
main
John Lauer
generate.py: emit the Same-net track spacing rule disabled (it flags every trace joint as an Overlap warning); regenera…
0f50312
1mo ago
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<?xml version="1.0" encoding="utf-8"?>
<!DOCTYPE designrules SYSTEM "eagle.dtd">
<eagle version="9.7.0">
<designrules name="eurocircuits-2L.edru">
<classes>
<class number="0" name="default">
</class>
<class number="1" name="pwr">
</class>
</classes>
<rules>
<rulecategory type="Copper Clearance" manualdrc="yes" livedrc="yes"/>
<rulecategory type="Keepout Clearance" manualdrc="yes" livedrc="yes"/>
<rulecategory type="Solder-Mask Clearance" manualdrc="yes" livedrc="yes"/>
<rulecategory type="Dimension Clearance" manualdrc="yes" livedrc="yes"/>
<rulecategory type="Drill Distance" manualdrc="yes" livedrc="yes"/>
<rulecategory type="Restrict Clearance" manualdrc="yes" livedrc="yes"/>
<rulecategory type="Minimum Drill Size" manualdrc="yes" livedrc="yes"/>
<rulecategory type="Minimum Copper Width" manualdrc="yes" livedrc="yes"/>
<rulecategory type="Acute Angle" manualdrc="yes" livedrc="yes"/>
<rulecategory type="Air-Wire" manualdrc="yes" livedrc="yes"/>
<rulecategory type="Small Gap" manualdrc="yes" livedrc="yes"/>
<rulecategory type="Wire Stub" manualdrc="yes" livedrc="no"/>
<rulecategory type="Matched Lengths" manualdrc="yes" livedrc="yes"/>
<rulecategory type="Via Restrict Clearance" manualdrc="yes" livedrc="yes"/>
<rule type="Minimum Copper Width" enabled="yes" priority="0" onescope="classes=1" value="0.1mm" preferredvalue="0.3mm" check_polywidth="no" name="Trace size for Power"/>
<rule type="Minimum Copper Width" builtin_ruleid="14" enabled="yes" priority="1" value="0.1mm" preferredvalue="0.2mm" check_polywidth="no" name="minimum-copper-width-1"/>
<rule type="Minimum Drill Size" enabled="yes" priority="0" onescope="is_via" value="0.1mm" preferredvalue="0.2mm" name="Min Via hole size on 2-layer"/>
<rule type="Minimum Drill Size" enabled="no" priority="1" onescope="all" value="0.5mm" preferredvalue="0.5mm" name="Min Non-plated holes"/>
<rule type="Minimum Drill Size" builtin_ruleid="15" enabled="yes" priority="2" value="0.1mm" preferredvalue="0.25mm" name="minimum-drill-size-1"/>
<rule type="Acute Angle" builtin_ruleid="16" enabled="no" priority="0" name="acute-angle-1"/>
<rule type="Wire Stub" builtin_ruleid="17" enabled="yes" priority="0" name="wire-stub-1"/>
<rule type="Air-Wire" builtin_ruleid="19" enabled="yes" priority="0" name="air-wire-1"/>
<rule type="Matched Lengths" builtin_ruleid="20" enabled="yes" priority="0" tolerance="10mm" gapfactor="2.5" name="matched-lengths-1"/>
<rule type="Copper Clearance" enabled="no" priority="0" onescope="all" otherscope="all" value="0.25mm" preferredvalue="0.25mm" samesignal="yes" bothscope="all" name="Same-net track spacing"/>
<rule type="Copper Clearance" builtin_ruleid="0" enabled="yes" priority="1" onescope="is_wire_polygon" otherscope="is_wire_polygon" value="0.1mm" preferredvalue="0.2mm" samesignal="no" name="copper-clearance-1"/>
<rule type="Copper Clearance" builtin_ruleid="1" enabled="yes" priority="2" onescope="is_wire_polygon" otherscope="is_pad_smd" value="0.1mm" preferredvalue="0.2mm" samesignal="no" name="copper-clearance-2"/>
<rule type="Copper Clearance" builtin_ruleid="2" enabled="yes" priority="3" onescope="is_wire_polygon" otherscope="is_via" value="0.1mm" preferredvalue="0.2mm" samesignal="no" name="copper-clearance-3"/>
<rule type="Copper Clearance" builtin_ruleid="3" enabled="yes" priority="4" onescope="is_pad_smd" otherscope="is_pad_smd" value="0.15mm" preferredvalue="0.15mm" samesignal="no" name="copper-clearance-4"/>
<rule type="Copper Clearance" builtin_ruleid="4" enabled="yes" priority="5" onescope="is_pad_smd" otherscope="is_via" value="0.1mm" preferredvalue="0.2mm" samesignal="no" name="copper-clearance-5"/>
<rule type="Copper Clearance" builtin_ruleid="5" enabled="yes" priority="6" onescope="is_via" otherscope="is_via" value="0.1mm" preferredvalue="0.2mm" samesignal="no" name="copper-clearance-6"/>
<rule type="Copper Clearance" builtin_ruleid="6" enabled="yes" priority="7" onescope="is_smd" otherscope="is_pad" value="0.1mm" preferredvalue="0.2mm" samesignal="yes" name="copper-clearance-7"/>
<rule type="Copper Clearance" builtin_ruleid="7" enabled="yes" priority="8" onescope="is_smd" otherscope="is_via" value="0.1mm" preferredvalue="0.2mm" samesignal="yes" name="copper-clearance-8"/>
<rule type="Copper Clearance" builtin_ruleid="8" enabled="yes" priority="9" onescope="is_smd" otherscope="is_smd" value="0.1mm" preferredvalue="0.2mm" samesignal="yes" name="copper-clearance-9"/>
<rule type="Dimension Clearance" builtin_ruleid="9" enabled="yes" priority="0" value="0.25mm" preferredvalue="0.4mm" name="dimension-clearance-1"/>
<rule type="Via Restrict Clearance" builtin_ruleid="21" enabled="yes" priority="0" value="0mil" preferredvalue="0mil" name="via-restrict-clearance-1"/>
<rule type="Restrict Clearance" builtin_ruleid="10" enabled="yes" priority="0" value="0mil" preferredvalue="0mil" name="restrict-clearance-1"/>
<rule type="Small Gap" builtin_ruleid="18" enabled="yes" priority="0" name="small-gap-1"/>
<rule type="Solder-Mask Clearance" builtin_ruleid="11" enabled="no" priority="0" value="0mil" preferredvalue="0mil" check_name="yes" check_value="no" name="solder-mask-clearance-1"/>
<rule type="Drill Distance" builtin_ruleid="12" enabled="yes" priority="0" value="0.25mm" preferredvalue="0.25mm" name="drill-distance-1"/>
<rule type="Keepout Clearance" builtin_ruleid="13" enabled="yes" priority="0" value="0mil" preferredvalue="0mil" name="keepout-clearance-1"/>
</rules>
<param name="mdWireWire" value="0.1mm"/>
<param name="mdWirePad" value="0.1mm"/>
<param name="mdWireVia" value="0.1mm"/>
<param name="mdPadPad" value="0.15mm"/>
<param name="mdPadVia" value="0.1mm"/>
<param name="mdViaVia" value="0.1mm"/>
<param name="mdSmdPad" value="0.1mm"/>
<param name="mdSmdVia" value="0.1mm"/>
<param name="mdSmdSmd" value="0.1mm"/>
<param name="mdCopperDimension" value="0.25mm"/>
<param name="mdDrill" value="0.25mm"/>
<param name="msWidth" value="0.1mm"/>
<param name="msDrill" value="0.1mm"/>
<param name="dpMaxLengthDifference" value="10mm"/>
<param name="dpGapFactor" value="2.5"/>
<description language="en">Eurocircuits 2-layer design rules (standard process)
Min trace width: 0.1 mm (3.94 mil) - pooling; non-pooling 0.090 mm (3.5433 mil)
Min spacing: 0.1 mm (3.94 mil) - pooling; non-pooling 0.090 mm (3.5433 mil); pattern class table: class 6 track/gap 0.150 mm (5.9055 mil), class 7 0.125 mm (4.9213 mil), class 8 0.100 mm (3.937 mil), class 9 0.090 mm (3.5433 mil), class 5 0.175 mm (6.8898 mil)
Min drill: 0.1 mm (3.94 mil)
Min via: 0.1 mm hole / 0.4 mm pad
Annular ring: via 0.125 mm
Copper to board edge: 0.25 mm
Hole to hole: 0.25 mm
Board thickness options: 1.0 mm, 1.55 mm, 2.4 mm
Copper weight options: 0.5 oz, 0.67 oz, 1 oz, 2 oz
Surface finishes: ENIG, LF HAL, Immersion Silver
Max board size: 580 x 425 mm
Min board 5 x 5 mm. Base copper foil pooling 2 layer: 12 µm (0.33 oz), 18 µm (0.5 oz), 35 µm (1 oz), 70 µm (2 oz); inner layers 18 µm and 35 µm. Minimum pad diameter: outer PTH finished hole plus 0.300 mm, outer NPTH plus 0.200 mm, inner PTH plus 0.350 mm, inner NPTH plus 0.250 mm. Classification min pattern values also limited by base copper foil: 12 µm 0.090 mm (3.5 mil), 18 µm 0.100 mm (4 mil), 35 µm 0.125 mm (5 mil), 70 µm 0.200 mm (8 mil), 105 µm 0.250 mm (10 mil), for both outer and inner layers. Drill class minimum TOOLSIZE: class A 0.60 mm (23.622 mil), B 0.45 mm (17.7165 mil), C 0.35 mm (13.7795 mil), D 0.25 mm (9.8425 mil), E 0.20 mm (7.874 mil); max board thickness per drill class: A and B 3.20 mm, C 2.40 mm, D 2.00 mm, E 1.60 mm; aspect ratio 1:8. TOOLSIZE equals finished PTH size plus 0.10 mm (4 mil). Soldermask colors pooling: green, blue, black, white, red; non-pooling transparent. Legend white one or both sides, non-pooling black and white.
Sources:
- https://www.eurocircuits.com/services/standard-pool/ (read 2026-09-03)
- https://www.eurocircuits.com/technical-guidelines/pcb-design-guidelines/classification/ (read 2026-09-03)
- https://www.eurocircuits.com/content/uploads/2025/04/EC-classification-ENGLISH-5-2024-V3.png (read 2026-09-03)
</description>
<param name="layerSetup" value="(1*16)"/>
<param name="mtCopper" value="0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm"/>
<param name="mtIsolate" value="1.6mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm"/>
<param name="mdViaViaSameLayer" value="6mil"/>
<param name="mnLayersViaInSmd" value="2"/>
<param name="mdSmdStop" value="0mil"/>
<param name="msMicroVia" value="0.3mm"/>
<param name="msBlindViaRatio" value="0.5"/>
<param name="rvPadTop" value="0"/>
<param name="rvPadInner" value="0"/>
<param name="rvPadBottom" value="0"/>
<param name="rvViaOuter" value="0"/>
<param name="rvViaInner" value="0"/>
<param name="rvMicroViaOuter" value="0"/>
<param name="rvMicroViaInner" value="0"/>
<param name="rlMinPadTop" value="0.18mm"/>
<param name="rlMaxPadTop" value="80mil"/>
<param name="rlMinPadInner" value="0.18mm"/>
<param name="rlMaxPadInner" value="20mil"/>
<param name="rlMinPadBottom" value="0.18mm"/>
<param name="rlMaxPadBottom" value="80mil"/>
<param name="rlMinViaOuter" value="0.125mm"/>
<param name="rlMaxViaOuter" value="20mil"/>
<param name="rlMinViaInner" value="0.125mm"/>
<param name="rlMaxViaInner" value="20mil"/>
<param name="rlMinMicroViaOuter" value="0.125mm"/>
<param name="rlMaxMicroViaOuter" value="20mil"/>
<param name="rlMinMicroViaInner" value="0.125mm"/>
<param name="rlMaxMicroViaInner" value="20mil"/>
<param name="psTop" value="-1"/>
<param name="psBottom" value="-1"/>
<param name="psFirst" value="-1"/>
<param name="psElongationLong" value="100"/>
<param name="psElongationOffset" value="100"/>
<param name="mvStopFrame" value="0"/>
<param name="mvCreamFrame" value="0"/>
<param name="mlMinStopFrame" value="0.038mm"/>
<param name="mlMaxStopFrame" value="4mil"/>
<param name="mlMinCreamFrame" value="0mil"/>
<param name="mlMaxCreamFrame" value="0mil"/>
<param name="mlViaStopLimit" value="0.5mm"/>
<param name="srRoundness" value="0"/>
<param name="srMinRoundness" value="0mil"/>
<param name="srMaxRoundness" value="0mil"/>
<param name="slThermalIsolate" value="10mil"/>
<param name="slThermalsForVias" value="0"/>
<param name="checkAngle" value="0"/>
<param name="checkRestrict" value="1"/>
<param name="checkStop" value="0"/>
<param name="checkValues" value="0"/>
<param name="checkNames" value="1"/>
<param name="checkWireStubs" value="1"/>
<param name="checkPolygonWidth" value="0"/>
<param name="useDiameter" value="13"/>
<param name="removeAnnularRing" value="0"/>
<param name="maxErrors" value="50"/>
</designrules>
</eagle>