DRV8300DRGER

{
  "slug": "drv8300drger",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Gate Drivers, VQFN-24(4x4). Datasheet-verified pinout, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "motor driver ics",
    "drv8300drger",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "drv8300drger.kicad_sym",
    "drv8300drger.kicad_mod",
    "drv8300drger.glb",
    "drv8300drger.step",
    "drv8300drger.lbr",
    "docs/hero.png",
    "docs/drv8300drger-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "component": {
    "mpn": "DRV8300DRGER",
    "manufacturer": "Texas Instruments",
    "package": "VQFN-24(4x4)",
    "pin_count": 25,
    "category": "Motor Driver ICs",
    "subcategory": "Gate Drivers",
    "datasheet": "https://www.ti.com/cn/lit/ds/symlink/drv8300.pdf",
    "parts": {
      "symbol": "drv8300drger.kicad_sym",
      "footprint": "drv8300drger.kicad_mod",
      "model_3d": "drv8300drger-etched.glb",
      "model_3d_plain": "drv8300drger.glb",
      "model_3d_step": "drv8300drger-etched.step",
      "model_3d_step_plain": "drv8300drger.step",
      "lbr": "drv8300drger.lbr"
    },
    "distributor_links": {
      "lcsc": "C3655801"
    },
    "pins": [
      {
        "number": "1",
        "name": "INLA",
        "type": "input",
        "description": "Low-side gate driver control input for phase A; VIL ≤ 0.8 V, VIH ≥ 2.0 V; 120-280 kΩ pull-down to GND in non-inverting mode or pull-up to INT_5V in inverting mode."
      },
      {
        "number": "2",
        "name": "INLB",
        "type": "input",
        "description": "Low-side gate driver control input for phase B; VIL ≤ 0.8 V, VIH ≥ 2.0 V; 120-280 kΩ pull-down to GND in non-inverting mode or pull-up to INT_5V in inverting mode."
      },
      {
        "number": "3",
        "name": "INLC",
        "type": "input",
        "description": "Low-side gate driver control input for phase C; VIL ≤ 0.8 V, VIH ≥ 2.0 V; 120-280 kΩ pull-down to GND in non-inverting mode or pull-up to INT_5V in inverting mode."
      },
      {
        "number": "4",
        "name": "GVDD",
        "type": "power_in",
        "description": "Gate driver power supply input; recommended operating range 5 V to 20 V; connect ≥10 µF X5R/X7R ceramic decoupling capacitor between GVDD and GND."
      },
      {
        "number": "5",
        "name": "MODE",
        "type": "input",
        "description": "Mode input selects GLx output polarity: floating = non-inverted (GLx in phase with INLx), connected to GVDD = inverted; VIL ≤ 0.6 V, VIH ≥ 3.7 V; 120-280 kΩ pull-down to GND."
      },
      {
        "number": "6",
        "name": "GND",
        "type": "power_in",
        "description": "Device ground."
      },
      {
        "number": "7",
        "name": "NC",
        "type": "unconnected",
        "description": "No internal connection; may be left floating or connected to system ground."
      },
      {
        "number": "8",
        "name": "NC",
        "type": "unconnected",
        "description": "No internal connection; may be left floating or connected to system ground."
      },
      {
        "number": "9",
        "name": "GLC",
        "type": "output",
        "description": "Low-side gate driver output for phase C; connect to gate of low-side power MOSFET; peak source 750 mA, peak sink 1.5 A; voltage swings 0 V to VGVDD."
      },
      {
        "number": "10",
        "name": "GLB",
        "type": "output",
        "description": "Low-side gate driver output for phase B; connect to gate of low-side power MOSFET; peak source 750 mA, peak sink 1.5 A; voltage swings 0 V to VGVDD."
      },
      {
        "number": "11",
        "name": "GLA",
        "type": "output",
        "description": "Low-side gate driver output for phase A; connect to gate of low-side power MOSFET; peak source 750 mA, peak sink 1.5 A; voltage swings 0 V to VGVDD."
      },
      {
        "number": "12",
        "name": "SHC",
        "type": "passive",
        "description": "High-side source sense input for phase C; connect to source of high-side power MOSFET (switch node); rated −2 V to 85 V DC, transient −22 V / 2 µs; leakage current ≤ 80 µA at VSHx = 0-85 V."
      },
      {
        "number": "13",
        "name": "GHC",
        "type": "output",
        "description": "High-side gate driver output for phase C; connect to gate of high-side power MOSFET; peak source 750 mA, peak sink 1.5 A; absolute maximum 125 V; swings between SHC and BSTC."
      },
      {
        "number": "14",
        "name": "BSTC",
        "type": "output",
        "description": "Bootstrap output for phase C; connect capacitor between BSTC and SHC (≥100 nF recommended); absolute maximum 125 V; DRV8300D uses integrated bootstrap diode from GVDD."
      },
      {
        "number": "15",
        "name": "SHB",
        "type": "passive",
        "description": "High-side source sense input for phase B; connect to source of high-side power MOSFET (switch node); rated −2 V to 85 V DC, transient −22 V / 2 µs; leakage current ≤ 80 µA at VSHx = 0-85 V."
      },
      {
        "number": "16",
        "name": "GHB",
        "type": "output",
        "description": "High-side gate driver output for phase B; connect to gate of high-side power MOSFET; peak source 750 mA, peak sink 1.5 A; absolute maximum 125 V; swings between SHB and BSTB."
      },
      {
        "number": "17",
        "name": "BSTB",
        "type": "output",
        "description": "Bootstrap output for phase B; connect capacitor between BSTB and SHB (≥100 nF recommended); absolute maximum 125 V; DRV8300D uses integrated bootstrap diode from GVDD."
      },
      {
        "number": "18",
        "name": "SHA",
        "type": "passive",
        "description": "High-side source sense input for phase A; connect to source of high-side power MOSFET (switch node); rated −2 V to 85 V DC, transient −22 V / 2 µs; leakage current ≤ 80 µA at VSHx = 0-85 V."
      },
      {
        "number": "19",
        "name": "GHA",
        "type": "output",
        "description": "High-side gate driver output for phase A; connect to gate of high-side power MOSFET; peak source 750 mA, peak sink 1.5 A; absolute maximum 125 V; swings between SHA and BSTA."
      },
      {
        "number": "20",
        "name": "BSTA",
        "type": "output",
        "description": "Bootstrap output for phase A; connect capacitor between BSTA and SHA (≥100 nF recommended); absolute maximum 125 V; DRV8300D uses integrated bootstrap diode from GVDD."
      },
      {
        "number": "21",
        "name": "DT",
        "type": "input",
        "description": "Deadtime control input (QFN-24 only); connect resistor to GND for variable deadtime (200 ns to 2000 ns linearly adjustable); floating = 215 ns typical fixed deadtime."
      },
      {
        "number": "22",
        "name": "INHA",
        "type": "input",
        "description": "High-side gate driver control input for phase A; VIL ≤ 0.8 V, VIH ≥ 2.0 V; 120-280 kΩ pull-down to GND."
      },
      {
        "number": "23",
        "name": "INHB",
        "type": "input",
        "description": "High-side gate driver control input for phase B; VIL ≤ 0.8 V, VIH ≥ 2.0 V; 120-280 kΩ pull-down to GND."
      },
      {
        "number": "24",
        "name": "INHC",
        "type": "input",
        "description": "High-side gate driver control input for phase C; VIL ≤ 0.8 V, VIH ≥ 2.0 V; 120-280 kΩ pull-down to GND."
      },
      {
        "number": "25",
        "name": "PowerPAD",
        "type": "power_in",
        "description": "Exposed thermal pad; must be soldered to PCB thermal pad for thermal and mechanical performance; RθJC(bot) = 11.5 °C/W."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.2",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.2",
        "primary_model": "claude-haiku-4-5-20251001",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-4-6",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Exposed thermal pad shown as pin 25 in mechanical drawing (pages 32-34, labeled 'EXPOSED THERMAL PAD",
          "1/25 pins cited to the wrong page (name found elsewhere): ['25:PowerPAD@p32']"
        ],
        "pages_sent": 35,
        "cost_usd": 0.3887,
        "at": "2026-09-22T01:59:30"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/ds/symlink/drv8300.pdf",
        "pages": 35,
        "sha256": "ce0cba4354bb3566",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 25,
        "described": 25,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "drv8300drger.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.0,
          4.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "f7d256794c4147daf24dcae0554fae18510315e565ad1e239b475be7fef80d8b",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "drv8300drger-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.0,
          4.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "364dc4d234fd52b41d014be54175ad59bde69a71a161150ca2b007888351bf51",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}