DRV8300DRGER

@@ -53,31 +53,31 @@         "number": "1",         "name": "INLA",         "type": "input",-        "description": "Low-side gate driver control input for phase A; VIL \u2264 0.8 V, VIH \u2265 2.0 V; 120-280 k\u03a9 pull-down to GND in non-inverting mode or pull-up to INT_5V in inverting mode."+        "description": "Low-side gate driver control input for phase A; VIL ≤ 0.8 V, VIH ≥ 2.0 V; 120-280 kΩ pull-down to GND in non-inverting mode or pull-up to INT_5V in inverting mode."       },       {         "number": "2",         "name": "INLB",         "type": "input",-        "description": "Low-side gate driver control input for phase B; VIL \u2264 0.8 V, VIH \u2265 2.0 V; 120-280 k\u03a9 pull-down to GND in non-inverting mode or pull-up to INT_5V in inverting mode."+        "description": "Low-side gate driver control input for phase B; VIL ≤ 0.8 V, VIH ≥ 2.0 V; 120-280 kΩ pull-down to GND in non-inverting mode or pull-up to INT_5V in inverting mode."       },       {         "number": "3",         "name": "INLC",         "type": "input",-        "description": "Low-side gate driver control input for phase C; VIL \u2264 0.8 V, VIH \u2265 2.0 V; 120-280 k\u03a9 pull-down to GND in non-inverting mode or pull-up to INT_5V in inverting mode."+        "description": "Low-side gate driver control input for phase C; VIL ≤ 0.8 V, VIH ≥ 2.0 V; 120-280 kΩ pull-down to GND in non-inverting mode or pull-up to INT_5V in inverting mode."       },       {         "number": "4",         "name": "GVDD",         "type": "power_in",-        "description": "Gate driver power supply input; recommended operating range 5 V to 20 V; connect \u226510 \u00b5F X5R/X7R ceramic decoupling capacitor between GVDD and GND."+        "description": "Gate driver power supply input; recommended operating range 5 V to 20 V; connect ≥10 µF X5R/X7R ceramic decoupling capacitor between GVDD and GND."       },       {         "number": "5",         "name": "MODE",         "type": "input",-        "description": "Mode input selects GLx output polarity: floating = non-inverted (GLx in phase with INLx), connected to GVDD = inverted; VIL \u2264 0.6 V, VIH \u2265 3.7 V; 120-280 k\u03a9 pull-down to GND."+        "description": "Mode input selects GLx output polarity: floating = non-inverted (GLx in phase with INLx), connected to GVDD = inverted; VIL ≤ 0.6 V, VIH ≥ 3.7 V; 120-280 kΩ pull-down to GND."       },       {         "number": "6",@@ -119,7 +119,7 @@         "number": "12",         "name": "SHC",         "type": "passive",-        "description": "High-side source sense input for phase C; connect to source of high-side power MOSFET (switch node); rated \u22122 V to 85 V DC, transient \u221222 V / 2 \u00b5s; leakage current \u2264 80 \u00b5A at VSHx = 0-85 V."+        "description": "High-side source sense input for phase C; connect to source of high-side power MOSFET (switch node); rated −2 V to 85 V DC, transient −22 V / 2 µs; leakage current ≤ 80 µA at VSHx = 0-85 V."       },       {         "number": "13",@@ -131,13 +131,13 @@         "number": "14",         "name": "BSTC",         "type": "output",-        "description": "Bootstrap output for phase C; connect capacitor between BSTC and SHC (\u2265100 nF recommended); absolute maximum 125 V; DRV8300D uses integrated bootstrap diode from GVDD."+        "description": "Bootstrap output for phase C; connect capacitor between BSTC and SHC (≥100 nF recommended); absolute maximum 125 V; DRV8300D uses integrated bootstrap diode from GVDD."       },       {         "number": "15",         "name": "SHB",         "type": "passive",-        "description": "High-side source sense input for phase B; connect to source of high-side power MOSFET (switch node); rated \u22122 V to 85 V DC, transient \u221222 V / 2 \u00b5s; leakage current \u2264 80 \u00b5A at VSHx = 0-85 V."+        "description": "High-side source sense input for phase B; connect to source of high-side power MOSFET (switch node); rated −2 V to 85 V DC, transient −22 V / 2 µs; leakage current ≤ 80 µA at VSHx = 0-85 V."       },       {         "number": "16",@@ -149,13 +149,13 @@         "number": "17",         "name": "BSTB",         "type": "output",-        "description": "Bootstrap output for phase B; connect capacitor between BSTB and SHB (\u2265100 nF recommended); absolute maximum 125 V; DRV8300D uses integrated bootstrap diode from GVDD."+        "description": "Bootstrap output for phase B; connect capacitor between BSTB and SHB (≥100 nF recommended); absolute maximum 125 V; DRV8300D uses integrated bootstrap diode from GVDD."       },       {         "number": "18",         "name": "SHA",         "type": "passive",-        "description": "High-side source sense input for phase A; connect to source of high-side power MOSFET (switch node); rated \u22122 V to 85 V DC, transient \u221222 V / 2 \u00b5s; leakage current \u2264 80 \u00b5A at VSHx = 0-85 V."+        "description": "High-side source sense input for phase A; connect to source of high-side power MOSFET (switch node); rated −2 V to 85 V DC, transient −22 V / 2 µs; leakage current ≤ 80 µA at VSHx = 0-85 V."       },       {         "number": "19",@@ -167,7 +167,7 @@         "number": "20",         "name": "BSTA",         "type": "output",-        "description": "Bootstrap output for phase A; connect capacitor between BSTA and SHA (\u2265100 nF recommended); absolute maximum 125 V; DRV8300D uses integrated bootstrap diode from GVDD."+        "description": "Bootstrap output for phase A; connect capacitor between BSTA and SHA (≥100 nF recommended); absolute maximum 125 V; DRV8300D uses integrated bootstrap diode from GVDD."       },       {         "number": "21",@@ -179,25 +179,25 @@         "number": "22",         "name": "INHA",         "type": "input",-        "description": "High-side gate driver control input for phase A; VIL \u2264 0.8 V, VIH \u2265 2.0 V; 120-280 k\u03a9 pull-down to GND."+        "description": "High-side gate driver control input for phase A; VIL ≤ 0.8 V, VIH ≥ 2.0 V; 120-280 kΩ pull-down to GND."       },       {         "number": "23",         "name": "INHB",         "type": "input",-        "description": "High-side gate driver control input for phase B; VIL \u2264 0.8 V, VIH \u2265 2.0 V; 120-280 k\u03a9 pull-down to GND."+        "description": "High-side gate driver control input for phase B; VIL ≤ 0.8 V, VIH ≥ 2.0 V; 120-280 kΩ pull-down to GND."       },       {         "number": "24",         "name": "INHC",         "type": "input",-        "description": "High-side gate driver control input for phase C; VIL \u2264 0.8 V, VIH \u2265 2.0 V; 120-280 k\u03a9 pull-down to GND."+        "description": "High-side gate driver control input for phase C; VIL ≤ 0.8 V, VIH ≥ 2.0 V; 120-280 kΩ pull-down to GND."       },       {         "number": "25",         "name": "PowerPAD",         "type": "power_in",-        "description": "Exposed thermal pad; must be soldered to PCB thermal pad for thermal and mechanical performance; R\u03b8JC(bot) = 11.5 \u00b0C/W."+        "description": "Exposed thermal pad; must be soldered to PCB thermal pad for thermal and mechanical performance; RθJC(bot) = 11.5 °C/W."       }     ],     "provenance": {@@ -235,6 +235,46 @@     "viewers": {       "symbol": "viewers/symbol.html",       "footprint": "viewers/footprint.html"-    }+    },+    "models_3d": [+      {+        "file": "drv8300drger.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          4.0,+          4.0,+          0.77+        ],+        "zmin_mm": 0.0,+        "centre_offset_mm": 0.0,+        "footprint_binding": "identity",+        "sha256": "f7d256794c4147daf24dcae0554fae18510315e565ad1e239b475be7fef80d8b",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "drv8300drger-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          4.0,+          4.0,+          0.77+        ],+        "zmin_mm": 0.0,+        "centre_offset_mm": 0.0,+        "footprint_binding": "identity",+        "sha256": "364dc4d234fd52b41d014be54175ad59bde69a71a161150ca2b007888351bf51",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]   }-}\ No newline at end of file+}