component

CDSOT23-SM712

Public Made by Adom

by adom

Bourns TVS Diodes, SOT-23. KiCad symbol, footprint and 3D as used on Adom boards; pin functions from the manufacturer datasheet.

componenttransistors/thyristorscdsot23-sm712board-derived

Verified CDSOT23-SM712

by Claude, at Caleb Taylor's request · last 27 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 4 records

27 Oct 2026Claude, at Caleb Taylor's requestValidated against Bourns' CDSOT23-SM712 datasheet (REV. 06/24); 3D model rebuilt to the package drawingfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓Datasheet: Bourns REV. 06/24 downloaded 2026-10-27 from bourns.com/docs/Product-Datasheets/CDSOT23-SM712.pdf; replaces the JLCPCB copy of REV. 01/18
  • ✓Pins: the datasheet names pins only by number; schematic (p.1) shows pins 1 and 2 each joined to common pin 3 through a TVS stack; names 1/2/3 kept, all passive; descriptions rewritten from the p.1 schematic and Electrical Characteristics table
  • •Footprint vs Product Dimensions and Recommended Footprint (p.2): KiCad SOT-23 pads 1.325 x 0.60 mm at 2.275 mm row spacing and 1.90 mm pitch (E 1.90 BSC); Bourns recommends 0.85 x 0.85 mm pads at 2.00 mm row spacing. The KiCad pads span 0.475-1.80 mm from centre and cover the leads (lead span D 2.10-2.49, foot K 0.40-0.58, lead width F 0.30-0.50); pin 1 top-left, pin 2 bottom-left, pin 3 right: the datasheet top view rotated 90 degrees, not mirrored
  • ✓DigiKey CDSOT23-SM712TR-ND (Bourns Inc., tape and reel, from the DigiKey search; the page had false with a wrong 'no exact-MPN listing' note, now replaced) and Mouser 652-CDSOT23-SM712 (kept)
  • ✓3D source: tier 1 none (Bourns links its 3D models from the bourns.com product page, which answers curl (browser headers) with a Cloudflare JavaScript challenge (HTTP 403 "Just a moment..."); guessed /docs/ model paths return the same challenge; a web search found no direct bourns.com STEP. No manufacturer STEP retrievable without solving the challenge (2026-10-27).) Tier 2 rejected (KiCad Package_TO_SOT_SMD.3dshapes/SOT-23-3.step (= SOT-23.step): lead span 2.50 x length 3.00 x height 1.20 mm; G 0.89-1.17 and D 2.10-2.49: height and lead span out of tolerance.) Tier 3: model rebuilt with the KiCad 3D model generator (gitlab.com/kicad/libraries/kicad-packages3D-generator, commit e272fcc8) from Bourns CDSOT23-SM712 datasheet REV. 06/24, Product Dimensions, p.2; parameters in provenance/3d-generator-params.yaml; Adom-authored, CC-BY-SA-4.0
  • ✓3D body vs drawing: body 2.90 x 1.30 mm at the parting line (1.20 at top and bottom, 8 deg draft): A 2.80-3.00, C 1.20-1.40: pass; lead span 2.40 mm: D 2.10-2.49: pass; overall height 1.03 mm (etched 1.035): G 0.89-1.17: pass; standoff 0.10: H 0.05-0.15: pass; feet 0.40 wide, 0.45 long, 0.14 thick: F 0.30-0.50, K 0.40-0.58, L 0.08-0.20: pass; leads at x -1.20..-0.84 (y +/-0.95) and x +0.84..+1.20 (y 0): on footprint pads 1, 2 (x -1.1375) and 3 (x +1.1375): pass; no pin-1 dot on the part (Bourns marking A2YWWL only): none modelled
  • ✓3D pose: cdsot23-sm712.step and cdsot23-sm712-etched.step are Z-up, seated on z = 0, centred on the footprint origin (offset 0.0 mm), footprint (model) binding identity (step_pose.py); the source was built in the footprint frame, so the transform is identity; the etched file adds the adom-chip-laser MPN inlay on the top face; GLBs from step2glb convert; footprint (model) path now ${KIPRJMOD}/cdsot23-sm712.step with only that line changed (pads untouched); provenance/3d-model.json records source, terms, hashes, transform and checks
  • •Datasheet conflict: the Product Dimensions table prints H (standoff) as '0.05 - 0.015' mm while the inch column gives 0.002-0.006 in (0.05-0.15 mm); 0.05-0.15 mm used
  • ✓Symbol Datasheet / MPN / Manufacturer / DigiKey / Mouser / LCSC properties agree with page.json; footprint Datasheet property points at the manufacturer datasheet URL
  • ✓component-page-verify: all checks pass
Evidencedatasheet (Bourns)
Verified files✓ cdsot23-sm712.kicad_sym✓ cdsot23-sm712.kicad_mod✓ cdsot23-sm712.step
16 Oct 2026Claude (AI build)Related wiki pages exist for different orderable numbers (adom/cdsot23-sm712-es, adom/tpcd...superseded
reviewfor all variants
  • •Related wiki pages exist for different orderable numbers (adom/cdsot23-sm712-es, adom/tpcdsot23-sm712); this page is the plain CDSOT23-SM712.
16 Oct 2026Claude (AI build)The datasheet names pins only by number (Pin 1, 2, 3); the board symbol names (TVS1, TVS2,...superseded
reviewfor all variants
  • •The datasheet names pins only by number (Pin 1, 2, 3); the board symbol names (TVS1, TVS2, TVS2) are replaced by the numbers. Pin 3 is the common node of both TVS stacks.
16 Oct 2026Claude (AI build)Automated build checks (awaiting human validation)superseded
SymbolFootprint3D modelPinsfor all variants
  • ✓Footprint extracted pad-for-pad from the source board and normalized to the footprint frame (back-side parts un-mirrored)
  • ✓3D model seated z=0 at footprint origin (placement inverse; method centroid-matched to KiCad library models on 59 cases)
  • ✓adom-lbr generate + lint passed
  • ✓3 of 3 pins described from the datasheet (adom-ds2sf, page-cited)
  • •Not yet checked by a person: land pattern vs datasheet, pin-1/orientation, 3D body vs drawing
Evidencedatasheet
Verified files! cdsot23-sm712.kicad_sym! cdsot23-sm712.kicad_mod! cdsot23-sm712.step
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3D Model

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Symbol & Footprint

Schematic Symbol

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PCB Footprint

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Datasheet

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Contents

README

markdown

CDSOT23-SM712

Bourns · TVS Diodes · SOT-23

CDSOT23-SM712 from Bourns, in a SOT-23. Symbol and footprint are the ones used on Adom board designs (KiCad official libraries); the 3D model is Adom-generated from Bourns' package drawing with the KiCad 3D model generator. Pin functions are extracted from the manufacturer datasheet with page references.

Pinout

Pin Name Type Function
1 1 passive Pin 1: one end of a TVS diode stack whose other end is common pin 3 (schematic). Pin 3-1: VWM 7.0 V, VBR min 7.5 V at 1 mA; pin 1-3: VWM 12.0 V, VBR min 13.3 V. [datasheet p.1]
2 2 passive Pin 2: one end of a TVS diode stack whose other end is common pin 3 (schematic). Pin 3-2: VWM 7.0 V, VBR min 7.5 V at 1 mA; pin 2-3: VWM 12.0 V, VBR min 13.3 V. [datasheet p.1]
3 3 passive Pin 3: common node of the two TVS diode stacks (schematic); pins 1 and 2 are each specified against it. [datasheet p.1]

Key specifications

Parameter Value
Manufacturer Bourns
Package SOT-23
Category Transistors/Thyristors
Pins 3
LCSC C404012
Mouser 652-CDSOT23-SM712
DigiKey CDSOT23-SM712TR-ND
Distributor summary (LCSC listing, not datasheet) -55℃~+150℃ 14V、26V 1uA、20uA 2 400W 7.5V、13.3V 75pF 7V、12V ESD IEC 61000-4-2、IEC 61000-4-5、IEC 61000-4-4 SOT-23 ESD and Surge Protection (TVS/ESD) ROHS

CAD

  • Symbol: cdsot23-sm712 (source library Protection_CDT:CDSOT23-SM712_TVS)
  • Footprint: Package_TO_SOT_SMD:SOT-23-3
  • 3D model path in footprint: ${KIPRJMOD}/cdsot23-sm712.step (Adom-generated with the KiCad 3D model generator from Bourns' Product Dimensions table, REV. 06/24 p.2; CC-BY-SA-4.0; source, parameters and checks in provenance/3d-model.json)
  • 3D files: cdsot23-sm712-etched.step / cdsot23-sm712-etched.glb carry the MPN etch as a separate Adom.LaserEtch part; cdsot23-sm712.step / cdsot23-sm712.glb are the bare model.
  • EAGLE/Fusion library: cdsot23-sm712.lbr (adom-lbr)

Provenance

  • Datasheet: Bourns CDSOT23-SM712 datasheet (REV. 06/24, sha256 75c1a765dbea8b5d, retrieved 2026-10-27, tier: mfr)
  • CAD: Footprint and symbol: KiCad official libraries (CC-BY-SA 4.0) as used on Adom boards. 3D model: Adom-generated with the KiCad 3D model generator from Bourns' CDSOT23-SM712 Product Dimensions table (REV. 06/24, p.2), CC-BY-SA-4.0; see provenance/3d-model.json.
  • Pins: KiCad symbol from the source board + adom-ds2sf datasheet extraction (claude-opus-4-7).

Datasheet PDF