component
TPS65580PWPR
Public Made by Adomby adom
Texas Instruments DC-DC Converters, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS65580PWPR
Texas Instruments · DC-DC Converters · HTSSOP-20-EP
TPS65580PWPR from Texas Instruments, in a HTSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power supply input for high-side NFET drains and 5.5V linear regulator with recommended input voltage range of 4.5V to 18V. |
| 2 | VIN | power_in | Power supply input for high-side NFET drains and 5.5V linear regulator with recommended input voltage range of 4.5V to 18V. |
| 3 | VBST1 | input | Bootstrap supply input for channel 1 high-side NFET gate drive circuit with 0.1µF capacitor connection to SW1 required, absolute maximum voltage 26V (28V transient). |
| 4 | SW1 | output | Channel 1 switch node for high-side and low-side NFETs providing current limit comparator input with voltage range -2V to 20V (-3V to 22V transient). |
| 5 | PGND1 | power_in | Channel 1 power ground return for low-side MOSFET with current comparator reference function and voltage range -0.3V to 0.3V. |
| 6 | VREG5 | power_out | Regulated 5.5V output from internal linear regulator requiring 1.0µF ceramic bypass capacitor and providing maximum output current of 20mA at 6V input. |
| 7 | PG | tri_state | Open-drain power good output that pulls low when any output voltage is outside ±16% of target voltage with 2µs response time to low and 1.5ms delay to high. |
| 8 | EN1 | input | Enable input for converter channel 1 with H-level threshold 2.0V, L-level threshold 0.4V, and input resistance 225-900kΩ. |
| 9 | VFB1 | input | D-CAP2 feedback input for channel 1 connected to output voltage divider for regulation over voltage range of 0.76V to 7.0V. |
| 10 | GND | power_in | Signal ground reference point for feedback and control signals requiring connection of VFB returns at a single point. |
| 11 | VFB2 | input | D-CAP2 feedback input for channel 2 connected to output voltage divider for regulation over voltage range of 0.76V to 7.0V. |
| 12 | VFB3 | input | D-CAP2 feedback input for channel 3 connected to output voltage divider for regulation over voltage range of 0.76V to 7.0V. |
| 13 | EN2 | input | Enable input for converter channel 2 with H-level threshold 2.0V, L-level threshold 0.4V, and input resistance 225-900kΩ. |
| 14 | VBST2 | input | Bootstrap supply input for channel 2 high-side NFET gate drive circuit with 0.1µF capacitor connection to SW2 required, absolute maximum voltage 26V (28V transient). |
| 15 | SW2 | output | Channel 2 switch node for high-side and low-side NFETs providing current limit comparator input with voltage range -2V to 20V (-3V to 22V transient). |
| 16 | PGND2 | power_in | Channel 2 power ground return for low-side MOSFET with current comparator reference function and voltage range -0.3V to 0.3V. |
| 17 | EN3 | input | Enable input for converter channel 3 with H-level threshold 2.0V, L-level threshold 0.4V, and input resistance 225-900kΩ. |
| 18 | PGND3 | power_in | Channel 3 power ground return for low-side MOSFET with current comparator reference function and voltage range -0.3V to 0.3V. |
| 19 | SW3 | output | Channel 3 switch node for high-side and low-side NFETs providing current limit comparator input with voltage range -2V to 20V (-3V to 22V transient). |
| 20 | VBST3 | input | Bootstrap supply input for channel 3 high-side NFET gate drive circuit with 0.1µF capacitor connection to SW3 required, absolute maximum voltage 26V (28V transient). |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-20-EP |
| Category | Power Management (PMIC) |
| Pins | 21 |
CAD (KiCad official)
- Symbol:
TPS65580PWPR - Footprint:
Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm - 3D model: HTSSOP-20-EP (KiCad packages3D, STEP)
- 3D model files:
tps65580pwpr-etched.step/tps65580pwpr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps65580pwpr.step/tps65580pwpr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (26 pp, sha256
374a34500cfd4753, retrieved 2026-10-01, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).