OCuLink Riser for the Supermicro AIOM Slot
Public Unreviewedby John Lauer
Passive OCP NIC 3.0 SFF card that breaks a Supermicro AIOM slot's PCIe x16 into four OCuLink 4i ports (4 x4, Gen4): 6-layer, 85 ohm, length-matched, DRC-clean KiCad project with Gerbers, BOM and CPL.
AI Flow run: claude on board-0
Delivered at 2026-10-13T12:55:10Z: 505.3 min of AI time from the prompt to "done, here is your video" (935.7 min on the wall clock). Since then 0.0 min more of AI time over 1 follow-up prompt(s), listed under Sessions; none of it is in the delivery number.
Prompt at 2026-10-12T21:19:30Z (UTC). Flow: board. Every number here is from the run's append-only ledger (run.jsonl). AI time is the time the AI was working on a prompt: from the human's prompt to the AI's done, with any gap over 15 min where no command ran (unobserved, not proven idle) cut out.
The video
The final cut of this run, 60 s: only the moments something moved, every step in order, the AI's analysis drawings fullscreen, the run and step clocks in the corner, the words cut to the picture.
Sessions
One row per human prompt: the AI's time on it, unobserved gaps excluded by the heuristic, which may include external AI work.
| Session | Prompt at | Done at | AI time min | Unobserved gap min | What |
|---|---|---|---|---|---|
| 1 | 2026-10-12T21:19:30Z | 2026-10-13T12:53:38Z | 503.8 | 430 | the first prompt |
| 2 | 2026-10-13T12:53:40Z | 2026-10-13T12:55:11Z | 1.5 | 0 | follow-up (no prompt mark; say prompt --text next time) |
| all | 505.3 |
Per step
AI time only, the idle cut out.
| Step | AI min | AI thinking min | Tool min | Turns | Visits | Returns | Longest think |
|---|---|---|---|---|---|---|---|
| intake | 24.4 | 24.4 | 0.0 | 2 | 1 | 0 | 23.9 min |
| placement | 20.9 | 8.1 | 12.8 | 17 | 3 | 2 | 5.7 min |
| routing | 151.5 | 7.2 | 144.3 | 32 | 3 | 0 | 4.8 min |
| pours | 0.9 | 0.0 | 0.9 | 5 | 1 | 0 | 0.0 min |
| current | 42.6 | 0.0 | 42.6 | 21 | 1 | 0 | 0.0 min |
| thermal | 0.1 | 0.0 | 0.1 | 4 | 1 | 0 | 0.0 min |
| finish | 33.5 | 0.0 | 33.5 | 20 | 1 | 0 | 0.0 min |
| 3d | 3.6 | 0.0 | 3.6 | 6 | 1 | 0 | 0.0 min |
| components | 10.8 | 7.5 | 3.3 | 9 | 1 | 0 | 6.0 min |
| export | 173.9 | 0.0 | 173.9 | 16 | 1 | 0 | 0.0 min |
| fields | 10.9 | 0.0 | 10.9 | 3 | 1 | 0 | 0.0 min |
| libraries | 4.6 | 4.6 | 0.1 | 1 | 1 | 0 | 4.6 min |
| models | 6.2 | 3.4 | 2.8 | 6 | 1 | 0 | 2.0 min |
| nets | 1.3 | 0.0 | 1.3 | 3 | 1 | 0 | 0.0 min |
| outline | 0.2 | 0.0 | 0.2 | 2 | 1 | 0 | 0.0 min |
| rules | 0.3 | 0.3 | 0.0 | 7 | 1 | 0 | 0.2 min |
| silkscreen | 8.3 | 0.0 | 8.3 | 6 | 1 | 0 | 0.0 min |
| test-plan | 11.0 | 9.2 | 1.8 | 5 | 1 | 0 | 9.1 min |
| thermal-vias | 0.1 | 0.0 | 0.1 | 4 | 1 | 0 | 0.0 min |
| total | 505.3 | 64.8 | 440.5 |
Returns to earlier steps
- 2026-10-13T02:20:49Z back to placement (visit 2): the JLC 6L gate needs the stock rule pack: OCuLink A1/A21 pads trimmed 0.15 mm clear of the peg NPTH, so J2-J5 get the new footprint
- 2026-10-13T02:28:02Z back to placement (visit 3): the start board carried pre-trim copper of the PERST# buses; rebuilt from the final routes so the live plan and the start board split cleanly
Decisions along the way
- 2026-10-13T01:39:55Z clip-start:libraries-1
- 2026-10-13T01:45:04Z clip-start:models-1
- 2026-10-13T01:51:20Z clip-start:test-plan-1
- 2026-10-13T02:02:33Z clip-start:placement-1
- 2026-10-13T02:15:23Z clip-start:routing-1
- 2026-10-13T02:21:06Z clip-start:placement-2
- 2026-10-13T02:25:19Z clip-start:routing-2
- 2026-10-13T02:28:13Z clip-start:placement-3
- 2026-10-13T02:32:12Z clip-start:routing-3
- 2026-10-13T03:43:53Z clip guard: the routing clip ran 71 min, past its 30 min budget twice over; stopped by the guard
- 2026-10-13T03:46:20Z clip guard: the routing clip ran 74 min, past its 30 min budget twice over; stopped by the guard
- 2026-10-13T03:46:25Z clip-start:thermal-vias-1
- 2026-10-13T03:46:43Z clip-start:pours-1
- 2026-10-13T03:49:09Z clip-start:outline-1
- 2026-10-13T03:49:18Z clip-start:current-1
- 2026-10-13T04:10:41Z clip guard: the current clip ran 21 min, past its 10 min budget twice over; stopped by the guard
- 2026-10-13T06:06:47Z artifact analysis-image for current-1: DC current density on all six copper layers: the 0.1 A +3V3 aux load peaks at 47 A/mm² on a 0.2 mm In4 trace, under the 60 A/mm² limit; 3 mW of Joule loss
- 2026-10-13T06:06:53Z clip-start:thermal-1
- 2026-10-13T06:07:29Z artifact analysis-image for thermal-1: Heat flow in the copper, layer by layer: no part dissipates real power; the 3 mW Joule loss spreads into the ground pours and vias
- 2026-10-13T06:07:29Z artifact analysis-image for thermal-1: Temperature rise over the card: at most 66 mK in still air, 49 mK in moving air, against a 10 C budget
- 2026-10-13T06:19:27Z clip-start:nets-1
- 2026-10-13T06:19:31Z net +12V_EDGE: 51 items highlighted
- 2026-10-13T06:19:36Z net +3V3_EDGE: 128 items highlighted
- 2026-10-13T06:19:52Z net GND: 812 items highlighted
- 2026-10-13T06:19:57Z net PETp0: 57 items highlighted
- 2026-10-13T06:20:02Z net PETn0: 57 items highlighted
- 2026-10-13T06:20:08Z net PERp0: 70 items highlighted
- 2026-10-13T06:20:13Z net PERn0: 70 items highlighted
- 2026-10-13T06:20:18Z net REFCLKp0: 22 items highlighted
- 2026-10-13T06:20:23Z net REFCLKn0: 22 items highlighted
- 2026-10-13T06:20:28Z net PETp15: 26 items highlighted
- 2026-10-13T06:20:33Z net PETn15: 26 items highlighted
- 2026-10-13T06:20:39Z net +3V3_EDGE: 128 items highlighted
- 2026-10-13T06:20:44Z net +12V_EDGE: 51 items highlighted
- 2026-10-13T06:22:08Z clip-start:silkscreen-1
- 2026-10-13T06:34:24Z clip-start:3d-1
- 2026-10-13T07:25:08Z pulled 2 clip(s) that had not reached the run
- 2026-10-13T07:32:14Z clip-start:finish-1
- 2026-10-13T08:08:52Z clip guard: the finish clip ran 36 min, past its 10 min budget twice over; stopped by the guard
- 2026-10-13T08:38:54Z clip-start:export-1
- 2026-10-13T09:03:27Z clip guard: the export clip ran 24 min, past its 10 min budget twice over; stopped by the guard
- 2026-10-13T11:51:52Z recut: 22 clips re-cut (10x and action) with this binary's rules
Where the board stands
- gate: 0 new DRC errors, 0 unconnected, null inherited
- landed live: 0 of 0 route entries
- pours (landed): 1 groups, failed []
- copper kept (mm2 per layer): {"B.Cu":7235.63,"F.Cu":5140.25,"In1.Cu":8012.11,"In2.Cu":6379.85,"In3.Cu":8012.11,"In4.Cu":6007.98}
- analyze-current: pass
- analyze-thermal: pass
The steps on camera
One clip per step visit, sped up 10x, with the editor at the start and the end of the visit. A caption above every clip and screenshot says what it shows.
libraries
What this step does: Assemble and validate the reviewed symbols, footprints and selected model variants in the chosen EDA before placement.
Clip: libraries, the PCB editor from 2026-10-13T01:39:55Z to 2026-10-13T01:45:02Z. Motion only: 4.6 min of real time, 5 s of it had something moving; the clock in the corner is the real elapsed time.
Contact sheet: nine frames spread through the libraries clip, what the camera saw.
Screenshot: the board when libraries began.
Screenshot: the board when libraries ended.
models
What this step does: Check native board model resolution and inspect the selected library variants in the chosen EDA; use the component register for unresolved assets.
Clip: models, the PCB editor from 2026-10-13T01:45:04Z to 2026-10-13T01:51:18Z. Motion only: 5.6 min of real time, 0 s of it had something moving; the clock in the corner is the real elapsed time.
Contact sheet: nine frames spread through the models clip, what the camera saw.
Screenshot: the board when models began.
test-plan
What this step does: Think through how this board will be tested once it is built and on the probing workcell: the measurements a careful engineer would take (rails, switch node, feedback, ripple, enable, LEDs), the net each one needs, and a probe spot for every one. The binary checks each planned measurement has a probe-able spot (a 0.5 mm round test point or an exposed pad the pogo tip can land on, within 50 mm of a ground machine contact, not under a part body) and adds a test point to the netlist for every gap.
Clip: test-plan, the PCB editor from 2026-10-13T01:51:20Z to 2026-10-13T02:02:32Z. Motion only: 10.4 min of real time, 0 s of it had something moving; the clock in the corner is the real elapsed time.
Contact sheet: nine frames spread through the test-plan clip, what the camera saw.
Screenshot: the board when test-plan began.
placement
What this step does: place the parts for routability, current and heat; the binary packs, checks courtyards and lands moves; reserve visible space for connector labels and the two-sided service silkscreen; the switch-node check refuses switch copper under another part or a switch loop longer than the spec allows, and sends the AI back here
Clip: placement, the PCB editor from 2026-10-13T02:02:33Z to 2026-10-13T02:15:20Z. Motion only: 11.8 min of real time, 0 s of it had something moving; the clock in the corner is the real elapsed time.
Contact sheet: nine frames spread through the placement clip, what the camera saw.
Screenshot: the board when placement began.
routing
What this step does: route to 100 percent with the spec's rules, gate with KiCad's DRC, land as undo steps; the AI takes it with take route=ai
Clip: routing, the PCB editor from 2026-10-13T02:15:23Z to 2026-10-13T02:21:05Z. Motion only: 5.5 min of real time, 0 s of it had something moving; the clock in the corner is the real elapsed time.
Contact sheet: nine frames spread through the routing clip, what the camera saw.
Screenshot: the board when routing began.
Screenshot: the board when routing ended.
placement, visit 2 (rework)
What this step does: place the parts for routability, current and heat; the binary packs, checks courtyards and lands moves; reserve visible space for connector labels and the two-sided service silkscreen; the switch-node check refuses switch copper under another part or a switch loop longer than the spec allows, and sends the AI back here
Why the AI came back here: the JLC 6L gate needs the stock rule pack: OCuLink A1/A21 pads trimmed 0.15 mm clear of the peg NPTH, so J2-J5 get the new footprint
Clip: placement, visit 2 (rework), the PCB editor from 2026-10-13T02:21:06Z to 2026-10-13T02:25:17Z. Motion only: 4.0 min of real time, 1 s of it had something moving; the clock in the corner is the real elapsed time.
Contact sheet: nine frames spread through the placement, visit 2 (rework) clip, what the camera saw.
Screenshot: the board when placement, visit 2 (rework) began.
routing, visit 2
What this step does: route to 100 percent with the spec's rules, gate with KiCad's DRC, land as undo steps; the AI takes it with take route=ai
Clip: routing, visit 2, the PCB editor from 2026-10-13T02:25:19Z to 2026-10-13T02:28:11Z. Motion only: 2.7 min of real time, 1 s of it had something moving; the clock in the corner is the real elapsed time.
Contact sheet: nine frames spread through the routing, visit 2 clip, what the camera saw.
Screenshot: the board when routing, visit 2 began.
Screenshot: the board when routing, visit 2 ended.
placement, visit 3 (rework)
What this step does: place the parts for routability, current and heat; the binary packs, checks courtyards and lands moves; reserve visible space for connector labels and the two-sided service silkscreen; the switch-node check refuses switch copper under another part or a switch loop longer than the spec allows, and sends the AI back here
Why the AI came back here: the start board carried pre-trim copper of the PERST# buses; rebuilt from the final routes so the live plan and the start board split cleanly
Clip: placement, visit 3 (rework), the PCB editor from 2026-10-13T02:28:13Z to 2026-10-13T02:32:09Z. Motion only: 3.8 min of real time, 1 s of it had something moving; the clock in the corner is the real elapsed time.
Contact sheet: nine frames spread through the placement, visit 3 (rework) clip, what the camera saw.
Screenshot: the board when placement, visit 3 (rework) began.
routing, visit 3
What this step does: route to 100 percent with the spec's rules, gate with KiCad's DRC, land as undo steps; the AI takes it with take route=ai
Clip: routing, visit 3, the PCB editor from 2026-10-13T02:32:12Z to 2026-10-13T03:46:20Z. Motion only: 60.0 min of real time, 39 s of it had something moving; the clock in the corner is the real elapsed time.
Contact sheet: nine frames spread through the routing, visit 3 clip, what the camera saw.
Screenshot: the board when routing, visit 3 began.
thermal-vias
What this step does: Heatsink vias where the heat is: for every part that dissipates real power (the regulator, the inductor, the catch diode, the FETs), an array of vias in its thermal pad or the copper it dumps heat into, stitched to the ground or the plane on the other side, sized and counted from its dissipation; the AI reviews the plan and the binary lands it.
Clip: thermal-vias, the PCB editor from 2026-10-13T03:46:25Z to 2026-10-13T03:46:41Z. Motion only: 0.3 min of real time, 0 s of it had something moving; the clock in the corner is the real elapsed time.
Contact sheet: nine frames spread through the thermal-vias clip, what the camera saw.
Screenshot: the board when thermal-vias began.
Screenshot: the board when thermal-vias ended.
pours
What this step does: pour every net the spec names, keepouts along Kelvin taps, thermal and stitching vias, land, measure the copper kept
Clip: pours, the PCB editor from 2026-10-13T03:46:43Z to 2026-10-13T03:49:07Z. Motion only: 2.3 min of real time, 3 s of it had something moving; the clock in the corner is the real elapsed time.
Contact sheet: nine frames spread through the pours clip, what the camera saw.
Screenshot: the board when pours began.
Screenshot: the board when pours ended.
outline
What this step does: Round the board's corners: every sharp outline corner becomes a radius (1.0 mm by default, spec outline.cornerRadius), so the board is kind to hands, panels and the fab's router.
Clip: outline, the PCB editor from 2026-10-13T03:49:09Z to 2026-10-13T03:49:17Z. Motion only: 0.1 min of real time, 0 s of it had something moving; the clock in the corner is the real elapsed time.
Contact sheet: nine frames spread through the outline clip, what the camera saw.
Screenshot: the board when outline began.
Screenshot: the board when outline ended.
current
What this step does: IPC-2221 on every loaded net, pour and via capacity, the same-layer rule; then the AI's own current density drawing and a walkthrough of the pours it judged
Clip: current, the PCB editor from 2026-10-13T03:49:18Z to 2026-10-13T04:11:39Z. Motion only: 21.4 min of real time, 0 s of it had something moving; the clock in the corner is the real elapsed time.
Contact sheet: nine frames spread through the current clip, what the camera saw.
Screenshot: the board when current began.
The AI's drawing: DC current density on all six copper layers: the 0.1 A +3V3 aux load peaks at 47 A/mm² on a 0.2 mm In4 trace, under the 60 A/mm² limit; 3 mW of Joule loss
thermal
What this step does: copper and vias at every hot tab against the rise budget; then the AI's own temperature rise drawing and a walkthrough of the pours it judged
Clip: thermal, the PCB editor from 2026-10-13T06:06:53Z to 2026-10-13T06:07:37Z. Motion only: 0.7 min of real time, 0 s of it had something moving; the clock in the corner is the real elapsed time.
Contact sheet: nine frames spread through the thermal clip, what the camera saw.
Screenshot: the board when thermal began.
Screenshot: the board when thermal ended.
The AI's drawing: Heat flow in the copper, layer by layer: no part dissipates real power; the 3 mW Joule loss spreads into the ground pours and vias
The AI's drawing: Temperature rise over the card: at most 66 mK in still air, 49 mK in moving air, against a 10 C budget
fields
What this step does: the fields on the board: adom-fields solves the current density of every loaded net, the heat flow in each copper layer with the vias, and the temperature over the board; the AI reads the issues and walks the board in the app on camera
Clip: fields, the PCB editor from 2026-10-13T06:08:05Z to 2026-10-13T06:13:14Z. Motion only: 4.7 min of real time, 180 s of it had something moving; the clock in the corner is the real elapsed time.
Contact sheet: nine frames spread through the fields clip, what the camera saw.
fields
What this step does: the fields on the board: adom-fields solves the current density of every loaded net, the heat flow in each copper layer with the vias, and the temperature over the board; the AI reads the issues and walks the board in the app on camera
Clip: fields, the PCB editor from 2026-10-13T06:14:06Z to 2026-10-13T06:19:16Z. Motion only: 4.7 min of real time, 180 s of it had something moving; the clock in the corner is the real elapsed time.
Contact sheet: nine frames spread through the fields clip, what the camera saw.
nets
What this step does: the copper pour walkthrough: every poured net (and every loaded, wide or Kelvin net) highlighted on its own in turn, the board framed, so the viewer sees where each net's copper is; the AI names each one
Clip: nets, the PCB editor from 2026-10-13T06:19:27Z to 2026-10-13T06:22:06Z. Motion only: 1.9 min of real time, 8 s of it had something moving; the clock in the corner is the real elapsed time.
Contact sheet: nine frames spread through the nets clip, what the camera saw.
Screenshot: the board when nets began.
Screenshot: the board when nets ended.
silkscreen
What this step does: Make both faces useful in real service: references and values, verified connector and machine-contact pinouts, polarity, board identity and bring-up labels; review native plots and assembled visibility. Offer the optional shared silkscreen dashboard: real solver events, candidate reasons, live/replay separation, fitted-model inspection and separately recorded detailed/5s replays. Audit every fitted body and every via/hole across the whole board, both faces, with coverage counts. Missing Fab geometry is not free space; native DRC does not establish fitted visibility. Keep unresolved labels explicit and do not apply an incomplete layout. Native geometry/edit/undo/refresh belongs to the EDA bridge.
Clip: silkscreen, the PCB editor from 2026-10-13T06:22:08Z to 2026-10-13T06:34:22Z. Motion only: 10.8 min of real time, 2 s of it had something moving; the clock in the corner is the real elapsed time.
Contact sheet: nine frames spread through the silkscreen clip, what the camera saw.
Screenshot: the board when silkscreen began.
3d
What this step does: the 3D walkthrough: the viewer opened from the editor, then fit, top, tilt, orbit, zoom in, swing, front, bottom, flip, top, fit, all by menu command, no mouse
Clip: 3d, the PCB editor from 2026-10-13T06:35:43Z to 2026-10-13T06:36:27Z. Motion only: 0.4 min of real time, 4 s of it had something moving; the clock in the corner is the real elapsed time.
Contact sheet: nine frames spread through the 3d clip, what the camera saw.
Screenshot: the board when 3d began.
finish
What this step does: finish refuses until everything is true; the AI cuts the video and delivers
Clip: finish, the PCB editor from 2026-10-13T07:32:14Z to 2026-10-13T08:12:24Z. Motion only: 36.7 min of real time, 4 s of it had something moving; the clock in the corner is the real elapsed time.
Contact sheet: nine frames spread through the finish clip, what the camera saw.
Screenshot: the board when finish began.
export
What this step does: The finish line for the human: Gerbers, drill, BOM and pick-and-place (CPL) written from the finished board, checked, and announced in the chat with where every file is.
Clip: export, the PCB editor from 2026-10-13T08:38:54Z to 2026-10-13T09:05:02Z. Motion only: 24.6 min of real time, 3 s of it had something moving; the clock in the corner is the real elapsed time.
Contact sheet: nine frames spread through the export clip, what the camera saw.
Screenshot: the board when export began.
Delivered
What the AI said when it delivered (the video is at the top of this page):
Finished and published at https://wiki.adom.inc/john/oculink-aiom-riser (re-delivered after the land-vias evidence was refreshed). The 18 flagged clips have real frames (228 to 38515 each, recorded in run.json); the flags came from ffprobe missing at clip stop (adom/adom-aiflow#48).
Plan usage, the second cost line
Percent of each plan limit used, as the provider reports it, at the start of the run and at its end.
| Provider | Limit | At start | At end | Used by this run |
|---|---|---|---|---|
| claude | 5h | 2 % | 0 % | -2.0 % |
| claude | Fable | 0 % | 0 % | 0.0 % |
| claude | week | 0 % | 4 % | 4.0 % |
| codex | week | 49 % | 11 % | -38.0 % |
The limits are per account, not per run: every AI thread signed in as this user draws on the same numbers, so a run made while other threads were working shows their usage too. Read it as an upper bound unless this run was the only thread active.
Given back
7 issue(s) or PR(s) filed by this run's AI to make the tool better for every Adom user:
- issue https://wiki.adom.inc/adom/adom-aiflow/issues/45: etch planner: reversed top-face normal; TSSOP mark axis
- issue https://wiki.adom.inc/adom/adom-aiflow/issues/47: rules install ignores layers; gate vs 6L pack; plan shape
- issue https://wiki.adom.inc/adom/kicad-bridge/issues/125: courtyard check uses bounding boxes
- issue https://wiki.adom.inc/adom/adom-symbol/issues/5: group gaps off grid
- issue https://wiki.adom.inc/adom/kicad-bridge/issues/126: IPC move drops polygon closing vertex -> lib_footprint_mismatch
- issue https://wiki.adom.inc/adom/adom-fields/issues/11: 6-layer stacks, PCG refinement, via ring lost at 0.2 mm
- issue https://wiki.adom.inc/adom/adom-aiflow/issues/48: KiCad lane: silkscreen proof, export command, ffprobe-missing blank clips, adopt voids evidence
Adom processes PRs within minutes during business hours: a non-stop PR intake runs all day.