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John Lauer Add KiCad 3D renders, layer plots, GUI screenshots, simulation charts and GLB model 6c05cc3 11d ago

Diode-Bridge Voltage-Controlled Attenuator

A two-layer, hand-solderable analog board that turns a 0 to 2 V control voltage into audio attenuation, using four 1N4148 diodes as a current-biased shunt bridge. It was designed from scratch by Saif Abdessayed with Adom Hydrogen (Codex, GPT-6 Astra) as a full-workflow stress test: requirements in, then schematic, PCB, simulation, BOM and manufacturing files out, in 3 hours 14 minutes.

Status: prototype draft. No board has been built or measured. Saif's engineering review found defects to fix before fabrication (see Known issues).

The populated board in 3D, rendered in KiCad

3D views use KiCad's stock part models as stand-ins (see About the 3D views). A 3D model of the populated board is in models/diode-vca-attenuator.glb.

What it does

Supply External regulated +12 V / GND / -12 V (no on-board regulator)
Audio Ground-centered input, 20 Hz to 20 kHz, up to 12 Vpp
Control 0 to 2 V; more control voltage means less gain
Attenuation 15.9 dB at 2 V control with a 100 mVpp, 1 kHz input (simulated)
Load 100 kΩ resistive, on board
Board Two layers, through-hole, within 60 × 40 mm
Tools KiCad 10.0.6 through the Adom KiCad Bridge 1.0.53, ngspice

How it works: a TL072 section buffers the input. The second section servos a 2N3904 so the bridge bias current is about VCTRL / 8.06 kΩ. The bridge is fed from +12 V through 22 kΩ, and a 2.2 kΩ series resistor and the 100 kΩ load set the unattenuated path. More bias current lowers the diodes' small-signal resistance, which shunts more of the audio to ground.

Schematic

Schematic

The full sheet with its title block: schematic-full-sheet.png.

Board in 3D

Perspective view

Front right Back
Isometric, front right Isometric, back: the diode bridge, Q1 and U1
Top Bottom
Top Bottom
Diode bridge close-up Front close-up
D1 to D4 with Q1 and U1 U1, Q1 and the 220 uF bipolar caps

Front elevation, showing part heights

Bare board

Top Bottom Isometric
Bare top Bare bottom Bare isometric

About the 3D views

Saif's custom footprints carry no 3D models, so these renders put KiCad's stock models on a render-only copy of the board. They are close but not exact: C1 and C2 show a polarity stripe although the real parts are bipolar, Q1's flat face direction is a guess, and the terminal block bodies are deeper than the 7 mm footprint outline. The design files in this repo were not changed. The full model table is in images/kicad/README-visuals.md.

The renders do show real layout problems: C6 and C7 overlap and C7 runs under J3, R1 sits partly under J2, and R9 touches C4. With no courtyards, KiCad's DRC cannot catch any of these.

Board layers

Top copper Bottom copper (seen from below)
Front copper Back copper
Top side combined Both copper layers
F.Cu, mask, silkscreen and outline Front red over back blue
Silkscreen Fabrication layer
Front silkscreen Front fab: outlines, references, values
Front mask Back mask Outline and drills
Front mask Back mask Edge cuts

In KiCad

The project opened in KiCad 10.

PCB Editor

Schematic Editor 3D Viewer
Schematic Editor 3D Viewer

Simulated response (100 mVpp input)

Control Gain at 20 Hz Gain at 1 kHz Gain at 20 kHz
0 V -0.27 dB -0.27 dB -0.27 dB
0.5 V -7.63 dB -7.64 dB -7.64 dB
1.0 V -11.49 dB -11.52 dB -11.52 dB
1.5 V -14.11 dB -14.19 dB -14.19 dB
2.0 V -16.10 dB -16.23 dB -16.23 dB

Frequency response at each control voltage

Gain vs control Distortion vs control
Gain vs control voltage THD vs control voltage

Control feedthrough

This is small-signal only. At 12 Vpp the diodes leave their small-signal region: the model predicts just 0.83 dB of attenuation at 2 V control, with 5.69% THD. A design meant for full-scale input would scale the signal down before the diode bridge and restore the gain after it.

Known issues

From Saif's engineering review of the delivered package. These are now checks for AI Flow to catch on future boards.

  1. Diode symbol graphics are reversed. The custom diode declares pin 1 as the cathode on the left but draws the cathode bar on the right. The nets, pads and SPICE model are correct; only the drawing is wrong.
  2. Op-amp input pins are typed passive in the custom TL072 symbol, which weakens ERC.
  3. No courtyards on any of the 26 footprints, and C6 and C7 overlap by 1 mm (5 mm bodies with centers 4 mm apart).
  4. The B.Cu ground zone is unfilled in the saved board and the exported Gerbers, although the report describes a refilled pour. Ground is still connected by explicit tracks.
  5. The schematic is labels only: 63 local labels and no wires, a one-box TL072 and a circle for Q1. It is electrically correct but hard to follow.
  6. The terminal block footprint body is 7 mm deep, against 9.8 mm on Phoenix Contact's datasheet for the 1715721.
  7. Reference designators are on the fabrication layer only, not the silkscreen.

Earlier test: buffered RC low-pass filter

Before this board, Saif ran a simpler test: a 1 kHz RC low-pass filter with an MCP6001 follower. He corrected the first part choices, and the schematic run then took 35 minutes.

Hydrogen during the RC test: Codex working next to Parts Search

Parts Search Schematic
Parts Search finding the KEMET capacitor RC filter schematic
After routing Top copper Bottom copper
RC board after routing RC top copper RC bottom copper

Files

Folder Contents
diode-vca-attenuator.kicad_* The KiCad project: schematic, board, rules
libraries/ Custom symbol and footprint libraries (AnalogVCA_THT)
bom/ Bill of materials with exact MPNs and sourcing snapshots
manufacturing/ Gerbers, drill files and the fabrication release
assembly/ Assembly notes
simulation/ ngspice decks and results
reports/ ERC, DRC, parity and export results as returned by the tools
docs/ The generated engineering review, tool failure log and calculations
generate_project.py, tools/ The script Hydrogen wrote to generate the project
rc-filter-test/ Screenshots from the earlier RC filter test
images/ Renders, layer plots, charts and KiCad screenshots used on this page
models/ 3D model of the populated board (GLB, stock part models)

Manufacturing

The fabrication release is in manufacturing/fabrication-release/: Gerbers, drill files and the drill map (drill-maps.zip). Fix the known issues above before ordering boards.

Designed by Saif Abdessayed, October 2026.