# AFS_Adom vs the Rice Eclipse AFS board

Back to the [project page](../README.md).

Two boards built for the same job: the Rice Eclipse active fin stabilization (AFS) flight computer. The student version was designed by hand in KiCad by the subteam. AFS_Adom was designed by an AI, which never saw the student board. Both use the same sensor set, the same RP2350B, eight servo headers, an XT30 2S input, USB-C, microSD and the same 74AHCT541 servo-signal buffer.

The student project is linked here: [kicad/eclipse/Version2.kicad_pro](../kicad/eclipse/) (KiCad 9 project, read-only copy, 2026-10-17).

Every check below was run the same way on both boards, from their KiCad files. The student board was never edited.

![Both boards drawn at the same scale from their KiCad files: AFS_Adom 92 x 68 mm with parts on one side, the Rice Eclipse board 51 x 87 mm with parts on both sides](media/compare-boards.png)
*Same scale. The student board is about 30 % smaller in area and narrow enough (2 in) to slide into a small airframe. It does that by putting about half its parts on the bottom (lavender pads).*

## Side by side

| | AFS_Adom (AI) | Rice Eclipse (students) |
|---|---|---|
| Size | 92 x 68 mm (6256 mm2) | 50.8 x 87 mm (4420 mm2) |
| Assembly | one side; 172 footprints, of which 25 are test pads and 18 are molecule pins and contacts | both sides; 148 footprints (78 top, 70 bottom) |
| Stack-up | 4 layers, 1.6 mm | 4 layers, 1.6 mm |
| Routing | 2190 track segments, 3.4 m of track, 508 vias | 1167 segments, 2.1 m, 228 vias |
| Power path | two LTC4359 ideal diodes join USB and battery into one VSYS; two 2 A bucks (AP63205, AP63203) | a TPS2121 power mux on each rail picks between a battery-side buck (AP62150) and a USB-side supply (5 V direct, 3.3 V from an AP2112K LDO) |
| Current shunt (INA219) | 5 mOhm 2512, 40 mV at 8 A | 2 mOhm 1206, 16 mV at 8 A (lower loss, coarser reading) |
| Servo rail copper | 2 mm band on both outer layers, tied by vias | 1 mm bottom-layer bus plus a 720 mm2 inner-layer pour |
| Servo signals | SN74AHCT541 to 5 V | SN74AHCT541 to 5 V (same choice) |
| USB D+/D- | plain pair | coupled differential pair |
| Test points | 25 | 11 |

## Checks run on both

| Check | AFS_Adom (AI) | Rice Eclipse (students) |
|---|---|---|
| DRC, the board's own rules | 0 errors, 0 unconnected | 0 errors, 0 unconnected (its project rules allow 0 mm clearance; 112 warnings are KiCad 9 library-version mismatches) |
| DRC, same PCBWay 4-layer rule pack | 0 errors | 25 errors, all the USB pair's 0.120 mm spacing against PCBWay's 0.127 mm (fine at JLCPCB's 0.1 mm, which its fab plugin targets) |
| ERC | 0 errors, 3 warnings | 14 errors, all symbol typing rather than circuit faults: 10 missing PWR_FLAGs, 1 shared SPI MISO line, 3 sensor GND pins typed as power outputs |
| Peak current density (60 A/mm2 screen) | 59 A/mm2 (VSYS) | 415 A/mm2 on VSYS where the inner pour enters the header pins through thermal-relief spokes; 200 A/mm2 on +5 V through a 0.14 mm neck |
| Hottest part, still air | +27 C (bucks) | +57 C (the bottom-side AP62150, no heatsink vias) |
| Datasheet points checked | AP63203/05, LTC4359, RP2350 hardware guide (see the design notes) | AP62150 EN left floating: correct, the datasheet says "Leave floating for automatic startup" |

The current and heat numbers are Adom Fields screens with identical assumed loads on both boards, not measurements:
- **Loads.** 4 A sustained on the servo rail and its return, 1 A on 3.3 V, 1.1 A on 5 V.
- **Heat.** Bucks at 0.35 W and 0.30 W, the MCU at 0.6 W, and the shunt at I²R.

The student team's real load budget may differ, and a hotspot at a thermal-relief spoke is a local estimate.

![Temperature rise on both boards under the same loads and at the same scale: AFS_Adom bucks +27 C, Eclipse bottom-side buck +57 C](media/compare-thermal.png)
*Same loads, same colour scale. The difference is mostly copper and vias under the bucks. AFS_Adom gives each buck a solid ground joint, five or six vias and pours on both faces.*

![The Eclipse servo rail current per layer near the header row: the inner pour carries it, then crowds through the thermal-relief spokes into the header pins](media/compare-vsys-neck.png)
*The Eclipse servo rail. The inner VSYS pour (top right) carries the current well. It then squeezes into the header pins through thermal-relief spokes, and J7 also feeds the 1 mm bottom bus. A solid pour connection on those pins would remove the hotspot.*

## What each approach does better

**Where the students win:**
- **Form factor.** 2 in wide with double-sided assembly, sized for the airframe. AFS_Adom is a 92 x 68 mm Adom molecule.
- **USB routing.** The USB pair is routed as a coupled differential pair.
- **Leaner board.** Fewer vias (228 vs 508) and less track (2.1 m vs 3.4 m), so it should be cheaper to fab and assemble.
- **Rail-level source switching.** Each rail has its own mux, so the 3.3 V rail can come straight from USB through an LDO.

**Where the AI wins:**
- **Current and thermal margin.** Every loaded net is under the density screen, and the hottest part is 30 C cooler under the same loads.
- **Hygiene.** ERC is clean, there are more test points, and DRC passes against a stricter fab's rules.
- **The written record.** Simulations, a datasheet, design notes and a 48-entry iteration log of every attempt and change.

**Not compared yet:**
- **Design time.** The AI took about 10 h of active time across a 21 h run; the student team's hours are not known.
- **Real hardware.** Neither board's measured behaviour is known yet.

## Small fixes the analysis suggests for the student board

These are suggestions from the screens above, for the team to judge:
- **Servo header pins.** Connect them solidly to the VSYS pours instead of through thermal reliefs, or add a wider top-layer path from the shunt to the header row.
- **Bottom-side buck heat.** Add a few ground vias and more copper under the AP62150's GND pin; U14 is the hottest part.
- **+5 V neck.** Give the 5 V mux (U13) output more copper; its current leaves through a 0.14 mm neck at the output pins, then 0.2 mm tracks.
- **PWR_FLAGs.** Add them so ERC reads clean and real errors stand out.