component

XT2052Y2ASR-G

Public Made by Adom

by adom

NATLINEAR Battery Management, SOP-8-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componentpmicxt2052y2asr-g
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History of page.json

13 commits ← Back to file
xt2052y2asr-g: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
Ray · 2344780 · 1d ago
Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout")
Ray · 1d803ce · 13d ago
xt2052y2asr-g: laser-etched CAD + chip hero (factory 2.0.0 backfill)
Ray · f27f5ae · 19d ago
xt2052y2asr-g: backfill missing artifacts (variants)
Ray · ca8425d · 1mo ago
xt2052y2asr-g: publish the laser-etched STEP alongside the bare one
Ray · 60a569c · 1mo ago
Publish 0.2.0
Ray · 99fa3ac · 1mo ago
orderable attributes: rebuild .lbr with adom-lbr 2.18.0 so MPN, MANUFACTURER and the distributor part numbers reach <technology> (LCSC_PN C156449). The published library carried no attributes at all, so a BOM had nothing to buy from. Distributor PNs matched on exact MPN AND corroborating manufacturer.
Ray · f650348 · 1mo ago
add symbol pin "9" for the exposed thermal pad: the footprint carries the pad and the symbol had none, so it reached no net (vendor string 'SOP-8-EP' denotes an exposed pad)
Ray · e4c660f · 1mo ago
pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left)
Ray · ee39275 · 1mo ago
fix footprint: SOIC-8_3.9x4.9mm_P1.27mm -> SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm (ep_dropped, 8 pins; datasheet EP 2.413x3.302mm, land 2.41x3.3mm (Δ0.005mm))
Ray · eb89700 · 1mo ago
Set visibility: public
Ray · fcdda34 · 1mo ago
xt2052y2asr-g: factory component page (tier=lcsc)
Ray · 89c0fde · 1mo ago
Initial commit: component/xt2052y2asr-g
Ray · f9d7b9e · 1mo ago