component
XT2052Y2ASR-G
Public Made by Adomby adom
NATLINEAR Battery Management, SOP-8-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
page.json+122−8@@ -1,13 +1,132 @@ {+ "schema_version": 1,+ "type": "component", "slug": "xt2052y2asr-g",+ "title": "XT2052Y2ASR-G",+ "brief": "NATLINEAR Battery Management, SOP-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "NATLINEAR Battery Management, SOP-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "pmic", "xt2052y2asr-g" ],+ "component": {+ "mpn": "XT2052Y2ASR-G",+ "manufacturer": "NATLINEAR",+ "package": "SOP-8-EP",+ "pin_count": 9,+ "category": "PMIC",+ "subcategory": "Battery Management",+ "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/dce619e1de644d72850e7766d5dcd475.pdf",+ "parts": {+ "symbol": "xt2052y2asr-g.kicad_sym",+ "footprint": "xt2052y2asr-g.kicad_mod",+ "model_3d": "xt2052y2asr-g.glb",+ "model_3d_step": "xt2052y2asr-g.step",+ "lbr": "xt2052y2asr-g.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "NC",+ "type": "unconnected",+ "description": "No internal connection. Leave floating or tie to GND for improved layout."+ },+ {+ "number": "2",+ "name": "ISET",+ "type": "input",+ "description": "Charge-current program, monitor and shutdown pin. Charge current is set by a 1% resistor to GND: IBAT = (VISET/RISET) \u00d7 1000. In constant-current mode VISET \u2248 1.0V. Pulling ISET above 1.21V (via a 3\u00b5A internal pull-up when RISET is disconnected) puts the charger into shutdown (Icc drops to ~25\u00b5A); clamp voltage \u2248 2.4V. Reconnecting RISET to GND resumes normal operation."+ },+ {+ "number": "3",+ "name": "GND",+ "type": "power_in",+ "description": "Device ground. The EXPOSED PAD on the bottom of the package must also be tied to pin 3 / GND for proper operation and thermal dissipation."+ },+ {+ "number": "4",+ "name": "VIN",+ "type": "power_in",+ "description": "Positive supply input, 4.25V-6.5V operating (absolute max 7V; OVP trips above 6.8V). Requires at least a 1\u00b5F bypass capacitor. When VIN falls to within 30mV of VBAT the charger stops and BAT-pin drain drops below 0.1\u00b5A."+ },+ {+ "number": "5",+ "name": "VBAT",+ "type": "power_out",+ "description": "Battery connection to the single-cell Li-ion pack positive terminal. Regulated float voltage 4.2V (\u00b11%). When charging is complete and VIN is present, BAT draws ~2\u00b5A; if VIN is removed BAT draws <0.1\u00b5A (reverse-blocked). A \u22654.7\u00b5F capacitor on this pin is required for stable operation and no-battery detection."+ },+ {+ "number": "6",+ "name": "DONE",+ "type": "output",+ "description": "Open-drain charge-complete status output. Pulled low by an internal NMOS when the charge cycle finishes (VOL \u2248 0.35V at 5mA); high-impedance otherwise. Can directly drive an LED or a microcontroller input."+ },+ {+ "number": "7",+ "name": "CHRG",+ "type": "output",+ "description": "Open-drain charge-in-progress status output. Pulled low by an internal NMOS while the battery is being charged (VOL \u2248 0.35V at 5mA); high-impedance otherwise. Pulses at ~2Hz (with 4.7\u00b5F on BAT) to indicate the no-battery condition."+ },+ {+ "number": "8",+ "name": "NC",+ "type": "unconnected",+ "description": "No internal connection. Leave floating or tie to GND for improved layout."+ },+ {+ "number": "EP",+ "name": "EPAD",+ "type": "power_in",+ "description": "Exposed thermal pad on the underside of the package. Must be soldered to the GND copper plane and tied to pin 3 for proper thermal performance, especially in high-current (up to 1.0A / 1.2A) applications."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://datasheet.lcsc.com/datasheet/pdf/dce619e1de644d72850e7766d5dcd475.pdf",+ "pages": 9,+ "sha256": "13ed9ecb9230a2aa",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 9,+ "described": 9,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "NATLINEAR",+ "Package": "SOP-8-EP",+ "Category": "PMIC",+ "Pins": "9"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "xt2052y2asr-g"+ ],+ "discovery_pitch": "XT2052Y2ASR-G (NATLINEAR) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +144,5 @@ "docs/xt2052y2asr-g-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }