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XL74HC595

Public Made by Adom

by adom

XINLUDA Shifting Register, SOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs xl74hc595: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
package.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
page.json xl74hc595: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 22h ago
README.md xl74hc595: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 16d ago
xl74hc595-etched.fit.json xl74hc595: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
xl74hc595-etched.glb xl74hc595: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
xl74hc595-etched.step xl74hc595: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
xl74hc595.glb Publish 0.1.0 · Ray 1mo ago
xl74hc595.kicad_mod Publish 0.1.0 · Ray 1mo ago
xl74hc595.kicad_sym Publish 0.1.0 · Ray 1mo ago
xl74hc595.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect and oval pad as a SQUARE EAGLE smd; this carries the real pad shape across (0 -> 16 rounded pads) and stops dropping geometry drawn on KiCad User.N layers. Attributes, connects, pads and the pin-1 marker are gated against decreasing and are unchanged. · Ray 1mo ago
xl74hc595.step Publish 0.1.0 · Ray 1mo ago

XL74HC595

XINLUDA · Shifting Register · SOP-16

XL74HC595 from XINLUDA, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 QB tri_state Parallel tri-state output bit B from the 8-bit storage register. Drives up to -6 mA / +6 mA at VCC=4.5V and -7.8 mA / +7.8 mA at VCC=6V.
2 QC tri_state Parallel tri-state output bit C from the 8-bit storage register. Enabled when G is low.
3 QD tri_state Parallel tri-state output bit D from the 8-bit storage register. Enabled when G is low.
4 QE tri_state Parallel tri-state output bit E from the 8-bit storage register. Enabled when G is low.
5 QF tri_state Parallel tri-state output bit F from the 8-bit storage register. Enabled when G is low.
6 QG tri_state Parallel tri-state output bit G from the 8-bit storage register. Enabled when G is low.
7 QH tri_state Parallel tri-state output bit H (MSB) from the 8-bit storage register. Enabled when G is low.
8 GND power_in Digital ground reference (0 V).
9 Q'H output Serial data output from the shift register (not tri-stated). Used for cascading multiple XL74HC595 devices; connect to SER of the next stage.
10 SCLR input Shift register clear, active low. When low, the shift register contents are cleared (Q'H = 0). Does not affect the storage register.
11 SCK input Shift register clock input. Rising edge shifts data from SER into the shift register. Max 30 MHz typical (VCC=6V, up to 108 MHz typ per AC characteristics).
12 RCK input Storage register (latch) clock input. Rising edge latches the current shift register contents into the 8-bit storage register, updating QA-QH.
13 G input Output Enable, active low. When low, QA-QH are driven from the storage register; when high, QA-QH are in high-impedance state. Does not affect Q'H.
14 SER input Serial data input. Value present at SER is shifted into the shift register on the rising edge of SCK.
15 QA tri_state Parallel tri-state output bit A (LSB) from the 8-bit storage register. Enabled when G is low.
16 VCC power_in Digital power supply, 2 V to 6 V (absolute max +7 V). Bypass with a 100 nF ceramic capacitor close to the pin.

Key specifications

Parameter Value
Manufacturer XINLUDA
Package SOP-16
Category Logic
Pins 16

Ordering variants

Same part, different packaging or reel option.

  • XL74HC595
  • XL74HC595TS

CAD (KiCad official)

  • Symbol: XL74HC595
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOP-16 (KiCad packages3D, STEP)
  • 3D model files: xl74hc595-etched.step / xl74hc595-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xl74hc595.step / xl74hc595.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XINLUDA datasheet (13 pp, sha256 e0ba2b7daef7908f, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF