component
XL74HC595
Public Made by Adomby adom
XINLUDA Shifting Register, SOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left)
2f8f6b3
1mo ago
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{
"schema": "adom.pads/1",
"slug": "xl74hc595",
"footprint": "SOIC-16_3.9x9.9mm_P1.27mm",
"generated_from": {
"footprint": "SOIC-16_3.9x9.9mm_P1.27mm@sha256:f9b5075740f7816c",
"pins": "page.json:component.pins",
"overrides": null
},
"pin1": {
"pad": "1",
"at": [
-2.475,
-4.445
],
"corner": "top-left",
"source": "silk-marker",
"derived_from": "SOIC-16_3.9x9.9mm_P1.27mm@sha256:f9b5075740f7816c"
},
"pad_count": 16,
"symbol_pins": [
"1",
"10",
"11",
"12",
"13",
"14",
"15",
"16",
"2",
"3",
"4",
"5",
"6",
"7",
"8",
"9"
],
"paste_apertures": 0,
"issues": [],
"pads": [
{
"pad": "1",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
-4.445
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "1",
"name": "QB",
"type": "tri_state",
"description": "Parallel tri-state output bit B from the 8-bit storage register. Drives up to -6 mA / +6 mA at VCC=4.5V and -7.8 mA / +7.8 mA at VCC=6V.",
"is_pin1": true,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "2",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
-3.175
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "2",
"name": "QC",
"type": "tri_state",
"description": "Parallel tri-state output bit C from the 8-bit storage register. Enabled when G is low.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "3",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
-1.905
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "3",
"name": "QD",
"type": "tri_state",
"description": "Parallel tri-state output bit D from the 8-bit storage register. Enabled when G is low.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "4",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
-0.635
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "4",
"name": "QE",
"type": "tri_state",
"description": "Parallel tri-state output bit E from the 8-bit storage register. Enabled when G is low.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "5",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
0.635
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "5",
"name": "QF",
"type": "tri_state",
"description": "Parallel tri-state output bit F from the 8-bit storage register. Enabled when G is low.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "6",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
1.905
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "6",
"name": "QG",
"type": "tri_state",
"description": "Parallel tri-state output bit G from the 8-bit storage register. Enabled when G is low.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "7",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
3.175
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "7",
"name": "QH",
"type": "tri_state",
"description": "Parallel tri-state output bit H (MSB) from the 8-bit storage register. Enabled when G is low.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "8",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
4.445
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "8",
"name": "GND",
"type": "power_in",
"description": "Digital ground reference (0 V).",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "9",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
4.445
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "9",
"name": "Q'H",
"type": "output",
"description": "Serial data output from the shift register (not tri-stated). Used for cascading multiple XL74HC595 devices; connect to SER of the next stage.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "10",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
3.175
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "10",
"name": "SCLR",
"type": "input",
"description": "Shift register clear, active low. When low, the shift register contents are cleared (Q'H = 0). Does not affect the storage register.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "11",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
1.905
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "11",
"name": "SCK",
"type": "input",
"description": "Shift register clock input. Rising edge shifts data from SER into the shift register. Max 30 MHz typical (VCC=6V, up to 108 MHz typ per AC characteristics).",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "12",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
0.635
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "12",
"name": "RCK",
"type": "input",
"description": "Storage register (latch) clock input. Rising edge latches the current shift register contents into the 8-bit storage register, updating QA-QH.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "13",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
-0.635
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "13",
"name": "G",
"type": "input",
"description": "Output Enable, active low. When low, QA-QH are driven from the storage register; when high, QA-QH are in high-impedance state. Does not affect Q'H.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "14",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
-1.905
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "14",
"name": "SER",
"type": "input",
"description": "Serial data input. Value present at SER is shifted into the shift register on the rising edge of SCK.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "15",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
-3.175
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "15",
"name": "QA",
"type": "tri_state",
"description": "Parallel tri-state output bit A (LSB) from the 8-bit storage register. Enabled when G is low.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "16",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
-4.445
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "16",
"name": "VCC",
"type": "power_in",
"description": "Digital power supply, 2 V to 6 V (absolute max +7 V). Bypass with a 100 nF ceramic capacitor close to the pin.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
}
]
}