component

TPSM33620S5QRDNRQ1

Public Made by Adom

by adom

Texas Instruments DC DC Converters, QFN-11(3.5x4.5). KiCad symbol, footprint and 3D as used on Adom boards; pin functions from the manufacturer datasheet.

componentpower modulestpsm33620s5qrdnrq1board-derived

Verified TPSM33620S5QRDNRQ1

by Claude, at Caleb Taylor's request · last 28 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 4 records

28 Oct 2026Claude, at Caleb Taylor's requestValidated against TI's TPSM336xx-Q1 datasheet (SNVSCS7E, revised September 2026)files match
SymbolFootprint3D modelPinsfor all variants
  • ✓Datasheet: the page already carries TI's current edition (SNVSCS7E, April 2025, revised September 2026; sha256 9ecee6f360918744 matches ti.com/lit/ds/symlink/tpsm33620-q1.pdf fetched 2026-10-27); edition now recorded
  • ✓Orderable TPSM33620S5QRDNRQ1 is the TPSM33620-Q1 2 A, 5V fixed / adjustable, spread-spectrum option (Device Comparison Table, p.4); Active, QFN-FCMOD RDN, 3000 large T&R, marking 33620S5Q (p.41)
  • ✓All 11 pins match the Pin Functions table and Figure 5-1 (RDN 11-pin QFN-FCMOD top view, all variants, p.5) by number and name: PGOOD, EN, VIN, VOUT, SW, SW, BOOT, VCC, FB, GND, MODE/SYNC; no renames needed
  • ✓Pin types against the table (A = analog, P = power, G = ground): PGOOD output -> open_collector (open-drain output), VCC output -> power_out (internal LDO output), BOOT input -> passive (internal bootstrap node, needs no external connection); SW 5/6 kept passive (switch node, must not be connected); VIN power_in, VOUT power_out, GND power_in, EN/FB/MODE/SYNC input
  • ✓All 11 descriptions rewritten to the table wording (p.5); the earlier pin 5 and 6 text both said 'in parallel with pin 6', and others added facts not in the pin table (3V to 36V range on VIN, Auto/pulse-skipping wording)
  • ✓Footprint vs RDN0011B (p.46-47, drawing 4231197/C 05/2026): 11 pads in TI's top-view arrangement, pin 1 top-left, 1-3 down the left, 4/5 large pads lower left/right, 6-8 up the right, 9/10/11 along the top. Copper vs TI's land pattern example: pins 2/3/6/7 1.20 x 0.35 at x = ±1.40, y = -1.15/-0.65 (TI 1.1 x 0.25 at y 1.15/0.65); pins 1/8 1.20 x 0.475 at y = -1.962 (TI 1.125 x 0.37 at y 1.96); pins 9/11 0.35 x 0.90 at x = ±0.50, y = -2.05 (TI 0.25 x 0.8 at x 0.5, y 2.06); pads 4/5 1.60 x 2.15 at (±1.20, 1.00) (TI land x 0.45-1.95, y 0.025-2.02); every copper pad covers TI's land
  • •Pads 4, 5 and 10 are copper-only with separate F.Mask/F.Paste polygons: pads 4/5 mask x ±0.45..±1.95, y -0.025..2.025 with the notched outer edge of TI's drawing; pin 10 mask/paste 0.30 x 1.525 at y -2.45..-0.924 (TI (0.3) x (1.52)); pin 10 copper continues 0.44 mm wide under the body between pads 4 and 5 to y = 2.075, under solder mask, like TI's ground strip with optional vias; copper-to-copper gap to pads 4/5 is 0.18 mm
  • ✓3D model rebuilt (tier 3): the previous model, extracted from a board STEP (designer library Regulator_CDT), carried no licence. Tier 1 unusable: TI's RDN CAD is offered only through Ultra Librarian (reCAPTCHA + registration; its terms forbid creating libraries for distribution; the listed model is PSM33620S3QRDNRQ1). Tier 2: KiCad has no RDN0011B/QFN-FCMOD model. Hand-built in CadQuery from the RDN0011B outline (p.46, 4231197/C 05/2026), CC-BY-SA-4.0
  • ✓3D body vs RDN0011B (p.46-47): 3.50 x 4.50 x 2.00 mm (D 3.4-3.6, E 4.4-4.6, A 1.9-2.1); pads 4/5 1.10 x 2.05 with four 0.25 x 0.2 tabs each at 0.30 + 0.5k; pins 2/3/6/7 0.25 x 0.90 at 0.65/1.15; pins 1/8 0.37 x 0.925 centred 1.96 (land pattern (1.96)), pin 1 chamfered; pins 9/11 0.25 x 0.60 at x = +/-0.5; pin 10 0.30 x 1.35; terminals 0.20 thick, exposed on the side walls as the side view shows. Overlaid on TI's bottom view at 157.6 px/mm, every edge on TI's lines (docs/proof/tpsm33620s5qrdnrq1-3d-vs-drawing.png)
  • ✓Pose: Z-up, seated on z = 0, pin 1 top-left over pad 1 with a dimple in the drawing's pin-1 index area, footprint binding identity; step_pose.py PASS (centre 0.212 mm from the pad-pattern centre, which is asymmetric); MPN etched on top with adom-chip-laser 0.2.0; GLBs from step2glb 0.13.2 with PBR materials
  • •Not modelled: the outline's second line 0.05 mm inside the body edge (reference only) and the undimensioned tie-bar ticks on the bottom edge; A modelled at 2.00 (TI's outline view draws the 2.1 maximum)
  • ✓DigiKey 296-TPSM33620S5QRDNRQ1TR-ND (tape and reel) and Mouser 595-SM33620S5QRDNRQ1 (both product URLs name TPSM33620S5QRDNRQ1) kept and added to specs
  • •The footprint still carries a hidden SUB property naming TPSM33610S5QRDNRQ1 (the 1 A option in the same RDN package and pinout, p.4-5) and the tag TPSM33625RDNR from the designer's library; these are not errors in the pads but are not this MPN
  • ✓Symbol Datasheet / MPN / Manufacturer / DigiKey / Mouser / LCSC properties agree with page.json; footprint Datasheet property points at the manufacturer datasheet URL
  • ✓component-page-verify: all checks pass; adom-lbr validate OK
Evidence3D model over TI's bottom view3D model provenance
Verified files✓ tpsm33620s5qrdnrq1.kicad_sym✓ tpsm33620s5qrdnrq1.kicad_mod✓ tpsm33620s5qrdnrq1.step
16 Oct 2026Claude (AI build)3D model provenance: extracted from the source board STEP export (designer custom library ...superseded
reviewfor all variants
  • •3D model provenance: extracted from the source board STEP export (designer custom library Regulator_CDT); the upstream model licence is not stated, so the page licence is NOASSERTION.
16 Oct 2026Claude (AI build)The board stores this symbol under the library name Connector_Generic:Conn_02x03_Odd_Even ...superseded
reviewfor all variants
  • •The board stores this symbol under the library name Connector_Generic:Conn_02x03_Odd_Even (hand-edited) with cached fields naming TPSM33610S5QRDNRQ1 / TPSM33606S5QRDNRQ1; those fields are corrected on this page.
16 Oct 2026Claude (AI build)Automated build checks (awaiting human validation)superseded
SymbolFootprint3D modelPinsfor all variants
  • ✓Footprint extracted pad-for-pad from the source board and normalized to the footprint frame (back-side parts un-mirrored)
  • ✓3D model seated z=0 at footprint origin (placement inverse; method centroid-matched to KiCad library models on 59 cases)
  • ✓adom-lbr generate + lint passed
  • ✓11 of 11 pins described from the datasheet (adom-ds2sf, page-cited)
  • •Not yet checked by a person: land pattern vs datasheet, pin-1/orientation, 3D body vs drawing
Evidencedatasheet
Verified files! tpsm33620s5qrdnrq1.kicad_sym! tpsm33620s5qrdnrq1.kicad_mod! tpsm33620s5qrdnrq1.step
Spot something wrong? Report it as an issue Propose a fix Records are signed by members of adom.
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by board-derived · KiCad file format 20241209
Name Last commit message Last updated
docs Publish 0.1.1 · Caleb 1d ago
provenance Publish 0.1.1 · Caleb 1d ago
package.json Publish 0.1.2 · Caleb 22h ago
page.json Set visibility: public · Caleb 22h ago
README.md Publish 0.1.1 · Caleb 1d ago
tpsm33620s5qrdnrq1-etched.glb Publish 0.1.1 · Caleb 1d ago
tpsm33620s5qrdnrq1-etched.step Publish 0.1.1 · Caleb 1d ago
tpsm33620s5qrdnrq1-hero.glb Publish 0.1.1 · Caleb 1d ago
tpsm33620s5qrdnrq1-hero.overlay.json Publish 0.1.1 · Caleb 1d ago
tpsm33620s5qrdnrq1.glb Publish 0.1.1 · Caleb 1d ago
tpsm33620s5qrdnrq1.kicad_mod Publish 0.1.1 · Caleb 1d ago
tpsm33620s5qrdnrq1.kicad_sym Publish 0.1.2 · Caleb 22h ago
tpsm33620s5qrdnrq1.lbr Publish 0.1.1 · Caleb 1d ago
tpsm33620s5qrdnrq1.step Publish 0.1.1 · Caleb 1d ago
verification.json Publish 0.1.2 · Caleb 22h ago

TPSM33620S5QRDNRQ1

Texas Instruments · DC DC Converters · QFN-11(3.5x4.5)

TPSM33620S5QRDNRQ1 from Texas Instruments, in a QFN-11(3.5x4.5). Symbol and footprint are the ones used on Adom board designs; the 3D model is built from TI's RDN0011B package drawing, seated in the footprint frame. Pin functions are extracted from the manufacturer datasheet with page references.

Pinout

Pin Name Type Function
1 PGOOD open_collector Power-good monitor. Open-drain output that asserts low if the feedback voltage is not within the specified window thresholds. A 10kΩ to 100kΩ pullup resistor is required. If not used, this pin can be left open or connected to GND. High = power OK, Low = power bad. PGOOD goes low when EN = Low. [datasheet p.5]
2 EN input Precision enable input. High = ON, Low = OFF. Precision enable allows the pin to be used as an adjustable UVLO. Can be connected directly to VIN. The module can be turned off by using an open-drain or collector device to connect this pin to GND. Place an external voltage divider between VIN, this pin, and GND to create an external UVLO. Do not float this pin. [datasheet p.5]
3 VIN power_in Input supply voltage. Connect the input supply to this pin. Connect a high-quality bypass capacitor or capacitors directly to this pin and GND in close proximity to the module. [datasheet p.5]
4 VOUT power_out Output voltage. The pin is connected to the integrated filter inductor. Connect the pin to the output load and connect external output capacitors between this pin and GND. For fixed output variants, connect the FB pin to VOUT. [datasheet p.5]
5 SW passive Power module switch node (pins 5 and 6). Do not place any external component on this pin or connect to any signal. The amount of copper placed on these pins must be kept to a minimum to prevent issues with noise and EMI. [datasheet p.5]
6 SW passive Power module switch node (pins 5 and 6). Do not place any external component on this pin or connect to any signal. The amount of copper placed on these pins must be kept to a minimum to prevent issues with noise and EMI. [datasheet p.5]
7 BOOT passive Bootstrap pin for internal high-side driver circuitry. A 100nF bootstrap capacitor is internally connected from this pin to SW within the module to provide the bootstrap voltage. [datasheet p.5]
8 VCC power_out Internal LDO output. Used as supply to internal control circuits. Do not connect to external loads. Can be used as logic supply for the power-good flag. Connect a high-quality 1µF capacitor from this pin to GND. [datasheet p.5]
9 FB input Feedback input. For the adjustable output, connect the mid-point of the output voltage feedback resistor divider to this pin, the upper resistor (RFBT) to VOUT at the desired point of regulation and the lower resistor (RFBB) to GND; keep the FB trace short. For a fixed output configuration, connect FB pin 9 directly to VOUT pin 4. Do not leave open or connect to GND. [datasheet p.5]
10 GND power_in Power ground terminal. Connect to system ground. Connect to CIN with short, wide traces. [datasheet p.5]
11 MODE/SYNC input The part can operate in user-selectable auto/FPWM operation based on the voltage at the MODE/SYNC pin. The part can also be synchronized to an external clock; the clock triggers on the rising edge of the applied external clock. Do not float this pin. [datasheet p.5]

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-11(3.5x4.5)
Category Power Modules
Pins 11
LCSC C51956999
Mouser 595-SM33620S5QRDNRQ1
DigiKey 296-TPSM33620S5QRDNRQ1TR-ND
Distributor summary (LCSC listing, not datasheet) QFN-11(3.5x4.5) DC-DC Power Modules ROHS

CAD

  • Symbol: tpsm33620s5qrdnrq1 (source library Connector_Generic:Conn_02x03_Odd_Even)
  • Footprint: Regulator_CDT:TPSM336_int-buck
  • 3D model path in footprint: ${KIPRJMOD}/tpsm33620s5qrdnrq1.step
  • 3D files: tpsm33620s5qrdnrq1-etched.step / tpsm33620s5qrdnrq1-etched.glb carry the MPN etch as a separate Adom.LaserEtch part; tpsm33620s5qrdnrq1.step / tpsm33620s5qrdnrq1.glb are the bare model. The model is AI-generated (Claude, for Adom): hand-built in CadQuery from TI's RDN0011B package outline (SNVSCS7E p.46), 3.50 x 4.50 x 2.00 mm with all 11 terminals as drawn; it is not TI's CAD and the etched part number is a virtual mark. Source record and builder: provenance/3d-model.json, provenance/tools/; overlay on TI's bottom view: docs/proof/tpsm33620s5qrdnrq1-3d-vs-drawing.png.
  • EAGLE/Fusion library: tpsm33620s5qrdnrq1.lbr (adom-lbr)

Provenance

  • Datasheet: Texas Instruments TPSM336xx-Q1 datasheet (SNVSCS7E, revised September 2026, sha256 9ecee6f360918744, retrieved 2026-10-27, tier: mfr)
  • CAD: Footprint and symbol as used on Adom board designs; 3D model Adom-built from TI's RDN0011B drawing (SNVSCS7E p.46).
  • License: CC-BY-SA-4.0 (Adom content, including the 3D model).
  • Pins: KiCad symbol from the source board + adom-ds2sf datasheet extraction (claude-opus-4-7).

Datasheet PDF