component

TPSM33620S5QRDNRQ1

Public Made by Adom

by adom

Texas Instruments DC DC Converters, QFN-11(3.5x4.5). KiCad symbol, footprint and 3D as used on Adom boards; pin functions from the manufacturer datasheet.

componentpower modulestpsm33620s5qrdnrq1board-derived

Verified TPSM33620S5QRDNRQ1

by Claude, at Caleb Taylor's request · last 28 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 4 records

28 Oct 2026Claude, at Caleb Taylor's requestValidated against TI's TPSM336xx-Q1 datasheet (SNVSCS7E, revised September 2026)files match
SymbolFootprint3D modelPinsfor all variants
  • ✓Datasheet: the page already carries TI's current edition (SNVSCS7E, April 2025, revised September 2026; sha256 9ecee6f360918744 matches ti.com/lit/ds/symlink/tpsm33620-q1.pdf fetched 2026-10-27); edition now recorded
  • ✓Orderable TPSM33620S5QRDNRQ1 is the TPSM33620-Q1 2 A, 5V fixed / adjustable, spread-spectrum option (Device Comparison Table, p.4); Active, QFN-FCMOD RDN, 3000 large T&R, marking 33620S5Q (p.41)
  • ✓All 11 pins match the Pin Functions table and Figure 5-1 (RDN 11-pin QFN-FCMOD top view, all variants, p.5) by number and name: PGOOD, EN, VIN, VOUT, SW, SW, BOOT, VCC, FB, GND, MODE/SYNC; no renames needed
  • ✓Pin types against the table (A = analog, P = power, G = ground): PGOOD output -> open_collector (open-drain output), VCC output -> power_out (internal LDO output), BOOT input -> passive (internal bootstrap node, needs no external connection); SW 5/6 kept passive (switch node, must not be connected); VIN power_in, VOUT power_out, GND power_in, EN/FB/MODE/SYNC input
  • ✓All 11 descriptions rewritten to the table wording (p.5); the earlier pin 5 and 6 text both said 'in parallel with pin 6', and others added facts not in the pin table (3V to 36V range on VIN, Auto/pulse-skipping wording)
  • ✓Footprint vs RDN0011B (p.46-47, drawing 4231197/C 05/2026): 11 pads in TI's top-view arrangement, pin 1 top-left, 1-3 down the left, 4/5 large pads lower left/right, 6-8 up the right, 9/10/11 along the top. Copper vs TI's land pattern example: pins 2/3/6/7 1.20 x 0.35 at x = ±1.40, y = -1.15/-0.65 (TI 1.1 x 0.25 at y 1.15/0.65); pins 1/8 1.20 x 0.475 at y = -1.962 (TI 1.125 x 0.37 at y 1.96); pins 9/11 0.35 x 0.90 at x = ±0.50, y = -2.05 (TI 0.25 x 0.8 at x 0.5, y 2.06); pads 4/5 1.60 x 2.15 at (±1.20, 1.00) (TI land x 0.45-1.95, y 0.025-2.02); every copper pad covers TI's land
  • •Pads 4, 5 and 10 are copper-only with separate F.Mask/F.Paste polygons: pads 4/5 mask x ±0.45..±1.95, y -0.025..2.025 with the notched outer edge of TI's drawing; pin 10 mask/paste 0.30 x 1.525 at y -2.45..-0.924 (TI (0.3) x (1.52)); pin 10 copper continues 0.44 mm wide under the body between pads 4 and 5 to y = 2.075, under solder mask, like TI's ground strip with optional vias; copper-to-copper gap to pads 4/5 is 0.18 mm
  • ✓3D model rebuilt (tier 3): the previous model, extracted from a board STEP (designer library Regulator_CDT), carried no licence. Tier 1 unusable: TI's RDN CAD is offered only through Ultra Librarian (reCAPTCHA + registration; its terms forbid creating libraries for distribution; the listed model is PSM33620S3QRDNRQ1). Tier 2: KiCad has no RDN0011B/QFN-FCMOD model. Hand-built in CadQuery from the RDN0011B outline (p.46, 4231197/C 05/2026), CC-BY-SA-4.0
  • ✓3D body vs RDN0011B (p.46-47): 3.50 x 4.50 x 2.00 mm (D 3.4-3.6, E 4.4-4.6, A 1.9-2.1); pads 4/5 1.10 x 2.05 with four 0.25 x 0.2 tabs each at 0.30 + 0.5k; pins 2/3/6/7 0.25 x 0.90 at 0.65/1.15; pins 1/8 0.37 x 0.925 centred 1.96 (land pattern (1.96)), pin 1 chamfered; pins 9/11 0.25 x 0.60 at x = +/-0.5; pin 10 0.30 x 1.35; terminals 0.20 thick, exposed on the side walls as the side view shows. Overlaid on TI's bottom view at 157.6 px/mm, every edge on TI's lines (docs/proof/tpsm33620s5qrdnrq1-3d-vs-drawing.png)
  • ✓Pose: Z-up, seated on z = 0, pin 1 top-left over pad 1 with a dimple in the drawing's pin-1 index area, footprint binding identity; step_pose.py PASS (centre 0.212 mm from the pad-pattern centre, which is asymmetric); MPN etched on top with adom-chip-laser 0.2.0; GLBs from step2glb 0.13.2 with PBR materials
  • •Not modelled: the outline's second line 0.05 mm inside the body edge (reference only) and the undimensioned tie-bar ticks on the bottom edge; A modelled at 2.00 (TI's outline view draws the 2.1 maximum)
  • ✓DigiKey 296-TPSM33620S5QRDNRQ1TR-ND (tape and reel) and Mouser 595-SM33620S5QRDNRQ1 (both product URLs name TPSM33620S5QRDNRQ1) kept and added to specs
  • •The footprint still carries a hidden SUB property naming TPSM33610S5QRDNRQ1 (the 1 A option in the same RDN package and pinout, p.4-5) and the tag TPSM33625RDNR from the designer's library; these are not errors in the pads but are not this MPN
  • ✓Symbol Datasheet / MPN / Manufacturer / DigiKey / Mouser / LCSC properties agree with page.json; footprint Datasheet property points at the manufacturer datasheet URL
  • ✓component-page-verify: all checks pass; adom-lbr validate OK
Evidence3D model over TI's bottom view3D model provenance
Verified files✓ tpsm33620s5qrdnrq1.kicad_sym✓ tpsm33620s5qrdnrq1.kicad_mod✓ tpsm33620s5qrdnrq1.step
16 Oct 2026Claude (AI build)3D model provenance: extracted from the source board STEP export (designer custom library ...superseded
reviewfor all variants
  • •3D model provenance: extracted from the source board STEP export (designer custom library Regulator_CDT); the upstream model licence is not stated, so the page licence is NOASSERTION.
16 Oct 2026Claude (AI build)The board stores this symbol under the library name Connector_Generic:Conn_02x03_Odd_Even ...superseded
reviewfor all variants
  • •The board stores this symbol under the library name Connector_Generic:Conn_02x03_Odd_Even (hand-edited) with cached fields naming TPSM33610S5QRDNRQ1 / TPSM33606S5QRDNRQ1; those fields are corrected on this page.
16 Oct 2026Claude (AI build)Automated build checks (awaiting human validation)superseded
SymbolFootprint3D modelPinsfor all variants
  • ✓Footprint extracted pad-for-pad from the source board and normalized to the footprint frame (back-side parts un-mirrored)
  • ✓3D model seated z=0 at footprint origin (placement inverse; method centroid-matched to KiCad library models on 59 cases)
  • ✓adom-lbr generate + lint passed
  • ✓11 of 11 pins described from the datasheet (adom-ds2sf, page-cited)
  • •Not yet checked by a person: land pattern vs datasheet, pin-1/orientation, 3D body vs drawing
Evidencedatasheet
Verified files! tpsm33620s5qrdnrq1.kicad_sym! tpsm33620s5qrdnrq1.kicad_mod! tpsm33620s5qrdnrq1.step
Spot something wrong? Report it as an issue Propose a fix Records are signed by members of adom.
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← Commit history

Add component CAD, datasheet and docs (3)

Caleb ·8ae5b07dda ·12d ago ·parent 6c80a5e
2 files changed +196
docs/tpsm33620s5qrdnrq1-datasheet.pdfpackage.json+196
docs/tpsm33620s5qrdnrq1-datasheet.pdfadded
⋯ 1 unchanged line ⋯
package.jsonadded+196
@@ -0,0 +1,196 @@+{+  "slug": "tpsm33620s5qrdnrq1",+  "version": "0.1.0",+  "type": "component",+  "tags": [+    "component",+    "power modules",+    "tpsm33620s5qrdnrq1",+    "board-derived",+    "staged-for-validation"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "verification.json",+    "tpsm33620s5qrdnrq1.kicad_sym",+    "tpsm33620s5qrdnrq1.kicad_mod",+    "tpsm33620s5qrdnrq1-etched.glb",+    "tpsm33620s5qrdnrq1-etched.step",+    "tpsm33620s5qrdnrq1.glb",+    "tpsm33620s5qrdnrq1.step",+    "tpsm33620s5qrdnrq1.lbr",+    "docs/hero.png",+    "docs/tpsm33620s5qrdnrq1-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "TPSM33620S5QRDNRQ1",+    "manufacturer": "Texas Instruments",+    "package": "QFN-11(3.5x4.5)",+    "pin_count": 11,+    "category": "Power Modules",+    "subcategory": "DC DC Converters",+    "datasheet": "https://www.ti.com/lit/ds/symlink/tpsm33620-q1.pdf",+    "parts": {+      "symbol": "tpsm33620s5qrdnrq1.kicad_sym",+      "footprint": "tpsm33620s5qrdnrq1.kicad_mod",+      "model_3d": "tpsm33620s5qrdnrq1-etched.glb",+      "model_3d_plain": "tpsm33620s5qrdnrq1.glb",+      "model_3d_step": "tpsm33620s5qrdnrq1-etched.step",+      "model_3d_step_plain": "tpsm33620s5qrdnrq1.step",+      "lbr": "tpsm33620s5qrdnrq1.lbr"+    },+    "distributor_links": {+      "digikey": {+        "part": "296-TPSM33620S5QRDNRQ1TR-ND",+        "url": "https://www.digikey.com/en/products/detail/texas-instruments/TPSM33620S5QRDNRQ1/27687227"+      },+      "mouser": {+        "part": "595-SM33620S5QRDNRQ1",+        "url": "https://www.mouser.com/en/ProductDetail/Texas-Instruments/TPSM33620S5QRDNRQ1?qs=PBDs2xEllI8AG1MPthcwcg%3D%3D"+      },+      "lcsc": {+        "part": "C51956999",+        "url": "https://www.lcsc.com/product-detail/C51956999.html"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "PGOOD",+        "type": "output",+        "description": "Power-good monitor. Open-drain output that asserts low when the feedback voltage is outside the specified window thresholds. Requires a 10kΩ to 100kΩ pullup resistor; may be left open or tied to GND if unused. High = power OK, Low = power bad; PGOOD goes low when EN is Low. [datasheet p.5]"+      },+      {+        "number": "2",+        "name": "EN",+        "type": "input",+        "description": "Precision enable input. High = ON, Low = OFF. Can be tied directly to VIN, driven by an open-drain/collector device, or used with an external VIN-to-GND resistor divider to set an adjustable UVLO threshold. Do not float this pin. [datasheet p.5]"+      },+      {+        "number": "3",+        "name": "VIN",+        "type": "power_in",+        "description": "Input supply voltage, 3V to 36V operating range. Connect the input supply and a high-quality bypass capacitor directly to this pin and GND in close proximity to the module. [datasheet p.5]"+      },+      {+        "number": "4",+        "name": "VOUT",+        "type": "power_out",+        "description": "Output voltage pin, connected internally to the integrated filter inductor. Connect external output capacitors between this pin and GND, and route to the load. For the S5 fixed-output configuration, tie FB (pin 9) directly to this pin for 5V output; for adjustable operation feed a resistor divider from this pin into FB. [datasheet p.5]"+      },+      {+        "number": "5",+        "name": "SW",+        "type": "passive",+        "description": "Power module internal switch node (connected in parallel with pin 6). Do not place any external component on this pin or connect to any signal. The copper area on this pin must be kept small to prevent noise and EMI issues. [datasheet p.5]"+      },+      {+        "number": "6",+        "name": "SW",+        "type": "passive",+        "description": "Power module internal switch node (connected in parallel with pin 6). Do not place any external component on this pin or connect to any signal. The copper area on this pin must be kept small to prevent noise and EMI issues. [datasheet p.5]"+      },+      {+        "number": "7",+        "name": "BOOT",+        "type": "input",+        "description": "Bootstrap pin for the internal high-side gate driver. A 100nF bootstrap capacitor is already connected internally from this pin to the SW node inside the module; no external bootstrap component is required. [datasheet p.5]"+      },+      {+        "number": "8",+        "name": "VCC",+        "type": "output",+        "description": "Internal LDO output used to supply the device's internal control circuitry. Do not connect to external loads. Can be used as the logic supply for a PGOOD pullup. Connect a high-quality 1µF ceramic capacitor from this pin to GND. [datasheet p.5]"+      },+      {+        "number": "9",+        "name": "FB",+        "type": "input",+        "description": "Feedback input to the error amplifier. For the S5 fixed 5V output, tie this pin directly to VOUT (pin 4). For adjustable operation, connect the mid-point of the RFBT/RFBB divider between VOUT and GND to this pin; keep the FB trace short and small to minimize noise coupling. Do not leave open or connect to GND. [datasheet p.5]"+      },+      {+        "number": "10",+        "name": "GND",+        "type": "power_in",+        "description": "Power ground terminal and system reference. Connect to the input capacitor CIN with short, wide traces and to the output capacitor return. [datasheet p.5]"+      },+      {+        "number": "11",+        "name": "MODE/SYNC",+        "type": "input",+        "description": "Mode select and external synchronization input. The DC voltage on this pin selects between Auto (pulse-skipping / light-load efficiency) and forced-PWM operation. An external clock applied to this pin synchronizes the converter's switching to the rising edge of the clock. Do not float this pin. [datasheet p.5]"+      }+    ],+    "provenance": {+      "factory_chain": {+        "pipeline": "adom-parts (board-derived) 0.1",+        "pins": "KiCad symbol from the source board + adom-ds2sf datasheet extraction (claude-opus-4-7)",+        "at": "2026-10-16"+      },+      "datasheet": {+        "url": "https://www.ti.com/lit/ds/symlink/tpsm33620-q1.pdf",+        "pages": 49,+        "sha256": "9ecee6f360918744113c28355ba10f58bc178cca6d25dcd95ea934037c5ba52e",+        "source_tier": "mfr"+      },+      "cad": "Footprint, symbol and 3D model as used on Adom board designs; the 3D model was extracted from the board STEP export",+      "pins": {+        "total": 11,+        "described": 11,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "tpsm33620s5qrdnrq1.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin",+        "seat": "z = 0 (PCB top surface)",+        "extents_mm": [+          3.5,+          4.5,+          1.907+        ],+        "zmin_mm": 0.025,+        "footprint_binding": "identity",+        "sha256": "dd6e8a8774a0ee56dbeb5823f61e4ffcc3c26c920f88f527ca5b06f933ee0fd1",+        "checked": "2026-10-16",+        "checked_by": "adom-parts/partstep.py (placement inverse from the source board; centroid-matched to KiCad library models on 59 reference cases)"+      },+      {+        "file": "tpsm33620s5qrdnrq1-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin",+        "seat": "z = 0 (PCB top surface)",+        "extents_mm": [+          3.5,+          4.5,+          1.909+        ],+        "zmin_mm": 0.025,+        "footprint_binding": "identity",+        "sha256": "f513acb94496e42c6c9e4255a35a28a02c001fd527574fece7d118cb4577780a",+        "checked": "2026-10-16",+        "checked_by": "adom-parts/partstep.py (placement inverse from the source board; centroid-matched to KiCad library models on 59 reference cases)"+      }+    ]+  },+  "description": "Texas Instruments DC DC Converters, QFN-11(3.5x4.5). KiCad symbol, footprint and 3D as used on Adom boards; pin functions from the manufacturer datasheet."+}\ No newline at end of file