component
TPS650532RGER
Public Made by Adomby adom
Texas Instruments DC-DC Converters, VQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS650532RGER
Texas Instruments · DC-DC Converters · VQFN-24-EP(4x4)
TPS650532RGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Power supply for digital and analog circuitry; must be connected to the same voltage supply as VINDCDC1/2. |
| 2 | VINLDO1 | power_in | Input voltage for LDO1; recommended operating range 1.5 V to 6.5 V. |
| 3 | VLDO1 | power_out | Output voltage of LDO1; externally adjustable from 1 V to 3.6 V with maximum output current of 400 mA. |
| 4 | FB_LDO1 | input | Feedback input for external voltage divider to adjust VLDO1 output voltage. |
| 5 | THRESHOLD | input | Reset threshold input; voltage exceeding 1 V triggers 100 ms delayed reset pulse. |
| 6 | FB_LDO2 | input | Feedback input for external voltage divider to adjust VLDO2 output voltage. |
| 7 | VLDO2 | power_out | Output voltage of LDO2; externally adjustable from 1 V to 3.6 V with maximum output current of 200 mA. |
| 8 | VINLDO2/3 | power_in | Input voltage for LDO2 and LDO3; recommended operating range 1.5 V to 6.5 V. |
| 9 | VLDO3 | power_out | Output voltage of LDO3; fixed at 1.5 V for TPS650532 variant with maximum output current of 200 mA. |
| 10 | RESET | tri_state | Open-drain active-low reset output with 100 ms reset delay time and 1 mA sink current capability. |
| 11 | EN_LDO2 | input | Enable input for LDO2; logic high enables the LDO, logic low disables and discharges output via 350 Ω resistor. |
| 12 | EN_LDO3 | input | Enable input for LDO3; logic high enables the LDO, logic low disables and discharges output via 350 Ω resistor. |
| 13 | FB_DCDC2 | input | Feedback input to adjust output voltage of DCDC2 between 0.6 V and VIN using external resistor divider. |
| 14 | PGND2 | power_in | Ground pin for converter 2; connect to AGND, PowerPAD, and main ground plane. |
| 15 | L2 | output | Switch pin of converter 2 operating at 2.25 MHz; connected to external inductor (1.5 μH to 2.2 μH) for DC-DC converter 2. |
| 16 | VINDCDC1/2 | power_in | Input voltage for DCDC1 and DCDC2 step-down converters; range 2.5 V to 6 V; must be connected to same supply as VCC. |
| 17 | L1 | output | Switch pin of converter 1 operating at 2.25 MHz; connected to external inductor (1.5 μH to 2.2 μH) for DC-DC converter 1. |
| 18 | PGND1 | power_in | Ground pin for converter 1; connect to AGND, PowerPAD, and main ground plane. |
| 19 | FB_DCDC1 | input | Feedback input to adjust output voltage of DCDC1 between 0.6 V and VIN using external resistor divider. |
| 20 | EN_DCDC1 | input | Enable input for converter 1; active high enables DC-DC conversion with soft start. |
| 21 | EN_DCDC2 | input | Enable input for converter 2; active high enables DC-DC conversion with soft start. |
| 22 | EN_LDO1 | input | Enable input for LDO1; logic high enables the LDO, logic low disables and discharges output via 350 Ω resistor. |
| 23 | MODE | input | Mode selection pin for both converters; low selects Power Save Mode with PFM at light loads, high selects forced PWM mode. |
| 24 | AGND | power_in | Analog ground; connect to PGND1, PGND2, PowerPAD, and main ground plane. |
| 25 | PowerPAD | power_in | Exposed thermal pad for thermal dissipation and ground connection; must be soldered to PCB ground plane. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-24-EP(4x4) |
| Category | Power Management (PMIC) |
| Pins | 25 |
CAD (KiCad official)
- Symbol:
TPS650532RGER - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm - 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
tps650532rger-etched.step/tps650532rger-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps650532rger.step/tps650532rger.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (38 pp, sha256
15a78f62021d882e, retrieved 2026-09-24, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).