component
TPS54427DDAR
Public Made by Adomby adom
Texas Instruments DC-DC Converters, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
footprint: the shipped SOIC-8 has no thermal pad, but the symbol and the datasheet both show 9 pads. datasheet EP 2.71x3.4mm, TI DDA PowerPAD; TI's own land pattern. Chosen from this part's OWN datasheet, not inferred from a sibling - the Richtek SOP-8-EP parts alone carry three different exposed-pad sizes, so family inference would have been wrong. Rebuilds the .lbr, re-derives pin 1 and pads.json.
254427a
1mo ago
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{
"schema": "adom.pads/1",
"slug": "tps54427ddar",
"footprint": "TI_SO-PowerPAD-8",
"generated_from": {
"footprint": "TI_SO-PowerPAD-8@sha256:251b438f7e2e0404",
"pins": "page.json:component.pins",
"overrides": null
},
"pin1": {
"pad": "1",
"at": [
-2.78,
-1.905
],
"corner": "top-left",
"source": "silk-marker",
"derived_from": "TI_SO-PowerPAD-8@sha256:251b438f7e2e0404"
},
"pad_count": 9,
"symbol_pins": [
"1",
"2",
"3",
"4",
"5",
"6",
"7",
"8",
"9"
],
"paste_apertures": 0,
"issues": [],
"pads": [
{
"pad": "1",
"kind": "smd",
"shape": "rect",
"at": [
-2.78,
-1.905
],
"rot": 0.0,
"size": [
1.91,
0.61
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "1",
"name": "EN",
"type": "input",
"description": "Enable input control. Active high; must be pulled up to enable the device. VIH ≥ 1.6 V, VIL ≤ 0.6 V. Internal ~450 kΩ pull-down to GND (225-900 kΩ). Absolute max −0.3 to 20 V.",
"is_pin1": true,
"source": {
"geometry": "TI_SO-PowerPAD-8.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "2",
"kind": "smd",
"shape": "rect",
"at": [
-2.78,
-0.635
],
"rot": 0.0,
"size": [
1.91,
0.61
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "2",
"name": "VFB",
"type": "input",
"description": "Converter feedback input. Connect to the output voltage via a resistor divider to set VOUT. Internal reference (VFBTH) is 765 mV typ (757-773 mV at 25 °C). Input current ±0.1 µA max.",
"is_pin1": false,
"source": {
"geometry": "TI_SO-PowerPAD-8.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "3",
"kind": "smd",
"shape": "rect",
"at": [
-2.78,
0.635
],
"rot": 0.0,
"size": [
1.91,
0.61
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "3",
"name": "VREG5",
"type": "power_out",
"description": "5.5 V internal LDO power supply output (5.2-5.7 V, up to 60 mA). Bypass with a ~1 µF capacitor to GND. Not active when EN is low. Also feeds internal gate drive.",
"is_pin1": false,
"source": {
"geometry": "TI_SO-PowerPAD-8.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "4",
"kind": "smd",
"shape": "rect",
"at": [
-2.78,
1.905
],
"rot": 0.0,
"size": [
1.91,
0.61
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "4",
"name": "SS",
"type": "input",
"description": "Soft-start control. Connect an external capacitor from SS to GND to program the soft-start ramp time. Absolute max −0.3 to 6.5 V.",
"is_pin1": false,
"source": {
"geometry": "TI_SO-PowerPAD-8.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "5",
"kind": "smd",
"shape": "rect",
"at": [
2.78,
1.905
],
"rot": 0.0,
"size": [
1.91,
0.61
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "5",
"name": "GND",
"type": "power_in",
"description": "Ground pin. Power ground return for the switching circuit. Sensitive SS and VFB returns must be tied to GND at a single point.",
"is_pin1": false,
"source": {
"geometry": "TI_SO-PowerPAD-8.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "6",
"kind": "smd",
"shape": "rect",
"at": [
2.78,
0.635
],
"rot": 0.0,
"size": [
1.91,
0.61
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "6",
"name": "SW",
"type": "power_out",
"description": "Switch node between the high-side NFET (drain of low-side, source of high-side). Connect to the output inductor. Absolute max −2 to 20 V (−3 to 22 V for 10 ns transients).",
"is_pin1": false,
"source": {
"geometry": "TI_SO-PowerPAD-8.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "7",
"kind": "smd",
"shape": "rect",
"at": [
2.78,
-0.635
],
"rot": 0.0,
"size": [
1.91,
0.61
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "7",
"name": "VBST",
"type": "power_in",
"description": "Bootstrap supply for the high-side FET gate driver. Connect a 0.1 µF capacitor between VBST and SW. An internal diode is connected between VREG5 and VBST for charging. VBST(vs SW) max 6 V.",
"is_pin1": false,
"source": {
"geometry": "TI_SO-PowerPAD-8.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "8",
"kind": "smd",
"shape": "rect",
"at": [
2.78,
-1.905
],
"rot": 0.0,
"size": [
1.91,
0.61
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "8",
"name": "VIN",
"type": "power_in",
"description": "Input voltage supply pin. Operating range 4.5 V to 18 V (absolute max 20 V). Bypass with ceramic capacitance close to the pin.",
"is_pin1": false,
"source": {
"geometry": "TI_SO-PowerPAD-8.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "9",
"kind": "smd",
"shape": "rect",
"at": [
-0.6025,
-0.775
],
"rot": 0.0,
"size": [
1.205,
1.55
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "9",
"name": "PowerPAD",
"type": "power_in",
"description": "Exposed thermal pad on the underside. Must be soldered to the PCB ground plane for proper thermal dissipation and must be electrically connected to GND.",
"is_pin1": false,
"source": {
"geometry": "TI_SO-PowerPAD-8.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
}
]
}