component
TPS54427DDAR
Public Made by Adomby adom
Texas Instruments DC-DC Converters, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
footprint: the shipped SOIC-8 has no thermal pad, but the symbol and the datasheet both show 9 pads. datasheet EP 2.71x3.4mm, TI DDA PowerPAD; TI's own land pattern. Chosen from this part's OWN datasheet, not inferred from a sibling - the Richtek SOP-8-EP parts alone carry three different exposed-pad sizes, so family inference would have been wrong. Rebuilds the .lbr, re-derives pin 1 and pads.json.
3 files changed
+423−400
pads.json+76−52@@ -1,23 +1,23 @@ { "schema": "adom.pads/1", "slug": "tps54427ddar",- "footprint": "SOIC-8_3.9x4.9mm_P1.27mm",+ "footprint": "TI_SO-PowerPAD-8", "generated_from": {- "footprint": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4",+ "footprint": "TI_SO-PowerPAD-8@sha256:251b438f7e2e0404", "pins": "page.json:component.pins", "overrides": null }, "pin1": { "pad": "1", "at": [- -2.475,+ -2.78, -1.905 ], "corner": "top-left", "source": "silk-marker",- "derived_from": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4"+ "derived_from": "TI_SO-PowerPAD-8@sha256:251b438f7e2e0404" },- "pad_count": 8,+ "pad_count": 9, "symbol_pins": [ "1", "2",@@ -30,26 +30,20 @@ "9" ], "paste_apertures": 0,- "issues": [- {- "kind": "pin-has-no-pad",- "pin": "9",- "detail": "the symbol declares pin \"9\" but the footprint has no such pad"- }- ],+ "issues": [], "pads": [ { "pad": "1", "kind": "smd",- "shape": "roundrect",+ "shape": "rect", "at": [- -2.475,+ -2.78, -1.905 ], "rot": 0.0, "size": [- 1.95,- 0.6+ 1.91,+ 0.61 ], "layers": [ "F.Cu",@@ -63,7 +57,7 @@ "description": "Enable input control. Active high; must be pulled up to enable the device. VIH ≥ 1.6 V, VIL ≤ 0.6 V. Internal ~450 kΩ pull-down to GND (225-900 kΩ). Absolute max −0.3 to 20 V.", "is_pin1": true, "source": {- "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+ "geometry": "TI_SO-PowerPAD-8.kicad_mod", "meaning": "page.json:component.pins", "correspondence": "kicad: symbol pin number == pad name" }@@ -71,15 +65,15 @@ { "pad": "2", "kind": "smd",- "shape": "roundrect",+ "shape": "rect", "at": [- -2.475,+ -2.78, -0.635 ], "rot": 0.0, "size": [- 1.95,- 0.6+ 1.91,+ 0.61 ], "layers": [ "F.Cu",@@ -93,7 +87,7 @@ "description": "Converter feedback input. Connect to the output voltage via a resistor divider to set VOUT. Internal reference (VFBTH) is 765 mV typ (757-773 mV at 25 °C). Input current ±0.1 µA max.", "is_pin1": false, "source": {- "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+ "geometry": "TI_SO-PowerPAD-8.kicad_mod", "meaning": "page.json:component.pins", "correspondence": "kicad: symbol pin number == pad name" }@@ -101,15 +95,15 @@ { "pad": "3", "kind": "smd",- "shape": "roundrect",+ "shape": "rect", "at": [- -2.475,+ -2.78, 0.635 ], "rot": 0.0, "size": [- 1.95,- 0.6+ 1.91,+ 0.61 ], "layers": [ "F.Cu",@@ -123,7 +117,7 @@ "description": "5.5 V internal LDO power supply output (5.2-5.7 V, up to 60 mA). Bypass with a ~1 µF capacitor to GND. Not active when EN is low. Also feeds internal gate drive.", "is_pin1": false, "source": {- "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+ "geometry": "TI_SO-PowerPAD-8.kicad_mod", "meaning": "page.json:component.pins", "correspondence": "kicad: symbol pin number == pad name" }@@ -131,15 +125,15 @@ { "pad": "4", "kind": "smd",- "shape": "roundrect",+ "shape": "rect", "at": [- -2.475,+ -2.78, 1.905 ], "rot": 0.0, "size": [- 1.95,- 0.6+ 1.91,+ 0.61 ], "layers": [ "F.Cu",@@ -153,7 +147,7 @@ "description": "Soft-start control. Connect an external capacitor from SS to GND to program the soft-start ramp time. Absolute max −0.3 to 6.5 V.", "is_pin1": false, "source": {- "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+ "geometry": "TI_SO-PowerPAD-8.kicad_mod", "meaning": "page.json:component.pins", "correspondence": "kicad: symbol pin number == pad name" }@@ -161,15 +155,15 @@ { "pad": "5", "kind": "smd",- "shape": "roundrect",+ "shape": "rect", "at": [- 2.475,+ 2.78, 1.905 ], "rot": 0.0, "size": [- 1.95,- 0.6+ 1.91,+ 0.61 ], "layers": [ "F.Cu",@@ -183,7 +177,7 @@ "description": "Ground pin. Power ground return for the switching circuit. Sensitive SS and VFB returns must be tied to GND at a single point.", "is_pin1": false, "source": {- "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+ "geometry": "TI_SO-PowerPAD-8.kicad_mod", "meaning": "page.json:component.pins", "correspondence": "kicad: symbol pin number == pad name" }@@ -191,15 +185,15 @@ { "pad": "6", "kind": "smd",- "shape": "roundrect",+ "shape": "rect", "at": [- 2.475,+ 2.78, 0.635 ], "rot": 0.0, "size": [- 1.95,- 0.6+ 1.91,+ 0.61 ], "layers": [ "F.Cu",@@ -213,7 +207,7 @@ "description": "Switch node between the high-side NFET (drain of low-side, source of high-side). Connect to the output inductor. Absolute max −2 to 20 V (−3 to 22 V for 10 ns transients).", "is_pin1": false, "source": {- "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+ "geometry": "TI_SO-PowerPAD-8.kicad_mod", "meaning": "page.json:component.pins", "correspondence": "kicad: symbol pin number == pad name" }@@ -221,15 +215,15 @@ { "pad": "7", "kind": "smd",- "shape": "roundrect",+ "shape": "rect", "at": [- 2.475,+ 2.78, -0.635 ], "rot": 0.0, "size": [- 1.95,- 0.6+ 1.91,+ 0.61 ], "layers": [ "F.Cu",@@ -243,7 +237,7 @@ "description": "Bootstrap supply for the high-side FET gate driver. Connect a 0.1 µF capacitor between VBST and SW. An internal diode is connected between VREG5 and VBST for charging. VBST(vs SW) max 6 V.", "is_pin1": false, "source": {- "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+ "geometry": "TI_SO-PowerPAD-8.kicad_mod", "meaning": "page.json:component.pins", "correspondence": "kicad: symbol pin number == pad name" }@@ -251,15 +245,15 @@ { "pad": "8", "kind": "smd",- "shape": "roundrect",+ "shape": "rect", "at": [- 2.475,+ 2.78, -1.905 ], "rot": 0.0, "size": [- 1.95,- 0.6+ 1.91,+ 0.61 ], "layers": [ "F.Cu",@@ -273,7 +267,37 @@ "description": "Input voltage supply pin. Operating range 4.5 V to 18 V (absolute max 20 V). Bypass with ceramic capacitance close to the pin.", "is_pin1": false, "source": {- "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+ "geometry": "TI_SO-PowerPAD-8.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "9",+ "kind": "smd",+ "shape": "rect",+ "at": [+ -0.6025,+ -0.775+ ],+ "rot": 0.0,+ "size": [+ 1.205,+ 1.55+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "9",+ "name": "PowerPAD",+ "type": "power_in",+ "description": "Exposed thermal pad on the underside. Must be soldered to the PCB ground plane for proper thermal dissipation and must be electrically connected to GND.",+ "is_pin1": false,+ "source": {+ "geometry": "TI_SO-PowerPAD-8.kicad_mod", "meaning": "page.json:component.pins", "correspondence": "kicad: symbol pin number == pad name" }
tps54427ddar.kicad_mod+280−300@@ -1,300 +1,280 @@-(footprint "SOIC-8_3.9x4.9mm_P1.27mm"- (version 20260206)- (generator "kicad-footprint-generator")- (layer "F.Cu")- (descr "SOIC, 8 Pin (JEDEC MS-012AA, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_8.pdf)")- (tags "SOIC SO")- (property "Reference" "REF**"- (at 0 -3.4 0)- (layer "F.SilkS")- (effects- (font- (size 1 1)- (thickness 0.15)- )- )- )- (property "Value" "SOIC-8_3.9x4.9mm_P1.27mm"- (at 0 3.4 0)- (layer "F.Fab")- (effects- (font- (size 1 1)- (thickness 0.15)- )- )- )- (property "KiLib_Generator" "package/gullwing"- (at 0 0 0)- (layer "F.SilkS")- (hide yes)- (effects- (font- (size 1 1)- (thickness 0.15)- )- )- )- (attr smd)- (duplicate_pad_numbers_are_jumpers no)- (fp_line- (start -2.06 -2.56)- (end 2.06 -2.56)- (stroke- (width 0.12)- (type solid)- )- (layer "F.SilkS")- )- (fp_line- (start -2.06 -2.465)- (end -2.06 -2.56)- (stroke- (width 0.12)- (type solid)- )- (layer "F.SilkS")- )- (fp_line- (start -2.06 2.56)- (end -2.06 2.465)- (stroke- (width 0.12)- (type solid)- )- (layer "F.SilkS")- )- (fp_line- (start 2.06 -2.56)- (end 2.06 -2.465)- (stroke- (width 0.12)- (type solid)- )- (layer "F.SilkS")- )- (fp_line- (start 2.06 2.465)- (end 2.06 2.56)- (stroke- (width 0.12)- (type solid)- )- (layer "F.SilkS")- )- (fp_line- (start 2.06 2.56)- (end -2.06 2.56)- (stroke- (width 0.12)- (type solid)- )- (layer "F.SilkS")- )- (fp_poly- (pts- (xy -2.6 -2.47)- (xy -2.84 -2.8)- (xy -2.36 -2.8)- )- (stroke- (width 0.12)- (type solid)- )- (fill yes)- (layer "F.SilkS")- )- (fp_line- (start -3.7 -2.46)- (end -2.2 -2.46)- (stroke- (width 0.05)- (type solid)- )- (layer "F.CrtYd")- )- (fp_line- (start -3.7 2.46)- (end -3.7 -2.46)- (stroke- (width 0.05)- (type solid)- )- (layer "F.CrtYd")- )- (fp_line- (start -2.2 -2.7)- (end 2.2 -2.7)- (stroke- (width 0.05)- (type solid)- )- (layer "F.CrtYd")- )- (fp_line- (start -2.2 -2.46)- (end -2.2 -2.7)- (stroke- (width 0.05)- (type solid)- )- (layer "F.CrtYd")- )- (fp_line- (start -2.2 2.46)- (end -3.7 2.46)- (stroke- (width 0.05)- (type solid)- )- (layer "F.CrtYd")- )- (fp_line- (start -2.2 2.7)- (end -2.2 2.46)- (stroke- (width 0.05)- (type solid)- )- (layer "F.CrtYd")- )- (fp_line- (start 2.2 -2.7)- (end 2.2 -2.46)- (stroke- (width 0.05)- (type solid)- )- (layer "F.CrtYd")- )- (fp_line- (start 2.2 -2.46)- (end 3.7 -2.46)- (stroke- (width 0.05)- (type solid)- )- (layer "F.CrtYd")- )- (fp_line- (start 2.2 2.46)- (end 2.2 2.7)- (stroke- (width 0.05)- (type solid)- )- (layer "F.CrtYd")- )- (fp_line- (start 2.2 2.7)- (end -2.2 2.7)- (stroke- (width 0.05)- (type solid)- )- (layer "F.CrtYd")- )- (fp_line- (start 3.7 -2.46)- (end 3.7 2.46)- (stroke- (width 0.05)- (type solid)- )- (layer "F.CrtYd")- )- (fp_line- (start 3.7 2.46)- (end 2.2 2.46)- (stroke- (width 0.05)- (type solid)- )- (layer "F.CrtYd")- )- (fp_poly- (pts- (xy -0.975 -2.45)- (xy 1.95 -2.45)- (xy 1.95 2.45)- (xy -1.95 2.45)- (xy -1.95 -1.475)- )- (stroke- (width 0.1)- (type solid)- )- (fill no)- (layer "F.Fab")- )- (fp_text user "${REFERENCE}"- (at 0 0 90)- (layer "F.Fab")- (effects- (font- (size 1 1)- (thickness 0.15)- )- )- )- (pad "1" smd roundrect- (at -2.475 -1.905)- (size 1.95 0.6)- (layers "F.Cu" "F.Mask" "F.Paste")- (roundrect_rratio 0.25)- )- (pad "2" smd roundrect- (at -2.475 -0.635)- (size 1.95 0.6)- (layers "F.Cu" "F.Mask" "F.Paste")- (roundrect_rratio 0.25)- )- (pad "3" smd roundrect- (at -2.475 0.635)- (size 1.95 0.6)- (layers "F.Cu" "F.Mask" "F.Paste")- (roundrect_rratio 0.25)- )- (pad "4" smd roundrect- (at -2.475 1.905)- (size 1.95 0.6)- (layers "F.Cu" "F.Mask" "F.Paste")- (roundrect_rratio 0.25)- )- (pad "5" smd roundrect- (at 2.475 1.905)- (size 1.95 0.6)- (layers "F.Cu" "F.Mask" "F.Paste")- (roundrect_rratio 0.25)- )- (pad "6" smd roundrect- (at 2.475 0.635)- (size 1.95 0.6)- (layers "F.Cu" "F.Mask" "F.Paste")- (roundrect_rratio 0.25)- )- (pad "7" smd roundrect- (at 2.475 -0.635)- (size 1.95 0.6)- (layers "F.Cu" "F.Mask" "F.Paste")- (roundrect_rratio 0.25)- )- (pad "8" smd roundrect- (at 2.475 -1.905)- (size 1.95 0.6)- (layers "F.Cu" "F.Mask" "F.Paste")- (roundrect_rratio 0.25)- )- (embedded_fonts no)- (model "${KICAD10_3DMODEL_DIR}/Package_SO.3dshapes/SOIC-8_3.9x4.9mm_P1.27mm.step"- (offset- (xyz 0 0 0)- )- (scale- (xyz 1 1 1)- )- (rotate- (xyz 0 0 0)- )- )-)+(footprint "TI_SO-PowerPAD-8" + (version 20260206) + (generator "pcbnew") + (generator_version "10.0") + (layer "F.Cu") + (descr "8-Lead Plastic PSOP, Exposed Die Pad (TI DDA0008B, see http://www.ti.com/lit/ds/symlink/lm3404.pdf)") + (tags "SSOP 0.50 exposed pad") + (property "Reference" "REF**" + (at 0 -3.3 0) + (layer "F.SilkS") + (uuid "76dfc6c2-dfba-41cf-b88f-87c5ccaab587") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Value" "TI_SO-PowerPAD-8" + (at 0 3.4 0) + (layer "F.Fab") + (uuid "4b0263c7-71f9-47e7-ba94-03b8e537a06b") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Datasheet" "" + (at 0 0 0) + (unlocked yes) + (layer "F.Fab") + (hide yes) + (uuid "533fa938-d50a-4260-91b6-4a55c8157fff") + (effects + (font + (size 1.27 1.27) + (thickness 0.15) + ) + ) + ) + (property "Description" "" + (at 0 0 0) + (unlocked yes) + (layer "F.Fab") + (hide yes) + (uuid "28160df4-76fa-4b39-9c76-594622ad081d") + (effects + (font + (size 1.27 1.27) + (thickness 0.15) + ) + ) + ) + (clearance 0.2) + (attr smd) + (duplicate_pad_numbers_are_jumpers no) + (fp_line + (start -2.075 -2.575) + (end 2.075 -2.575) + (stroke + (width 0.15) + (type solid) + ) + (layer "F.SilkS") + (uuid "952a71c7-019c-40f7-bf87-f24eae523d67") + ) + (fp_line + (start -2.075 2.575) + (end 2.075 2.575) + (stroke + (width 0.15) + (type solid) + ) + (layer "F.SilkS") + (uuid "6b05a05d-1e24-4f64-af17-b31d94eb6a2f") + ) + (fp_poly + (pts + (xy -2.5 -2.5) (xy -2.74 -2.83) (xy -2.26 -2.83) (xy -2.5 -2.5) + ) + (stroke + (width 0.12) + (type solid) + ) + (fill yes) + (layer "F.SilkS") + (uuid "e764276f-5831-4407-be23-fb8585d473c2") + ) + (fp_line + (start -4 -2.7) + (end -4 2.7) + (stroke + (width 0.05) + (type solid) + ) + (layer "F.CrtYd") + (uuid "468b4d46-891a-4ac2-be39-645979c5658a") + ) + (fp_line + (start -4 -2.7) + (end 4 -2.7) + (stroke + (width 0.05) + (type solid) + ) + (layer "F.CrtYd") + (uuid "09958cc5-9034-4eb0-8bf6-bb2c27be24c4") + ) + (fp_line + (start -4 2.7) + (end 4 2.7) + (stroke + (width 0.05) + (type solid) + ) + (layer "F.CrtYd") + (uuid "14497c76-5084-479d-903a-be55f3e82e9e") + ) + (fp_line + (start 4 -2.7) + (end 4 2.7) + (stroke + (width 0.05) + (type solid) + ) + (layer "F.CrtYd") + (uuid "d15c6388-0087-4858-97af-c09a653e939d") + ) + (fp_line + (start -1.95 -1.45) + (end -0.95 -2.45) + (stroke + (width 0.15) + (type solid) + ) + (layer "F.Fab") + (uuid "3bc1ea76-3cdc-4a8a-815b-9a529ecae57c") + ) + (fp_line + (start -1.95 2.45) + (end -1.95 -1.45) + (stroke + (width 0.15) + (type solid) + ) + (layer "F.Fab") + (uuid "3091f91f-77fa-49ba-b835-9237e3dcd2a6") + ) + (fp_line + (start -0.95 -2.45) + (end 1.95 -2.45) + (stroke + (width 0.15) + (type solid) + ) + (layer "F.Fab") + (uuid "9002ccf2-8a60-45dc-972f-12aa0bd077fb") + ) + (fp_line + (start 1.95 -2.45) + (end 1.95 2.45) + (stroke + (width 0.15) + (type solid) + ) + (layer "F.Fab") + (uuid "4de21e3c-3f89-4f09-8840-613afff96693") + ) + (fp_line + (start 1.95 2.45) + (end -1.95 2.45) + (stroke + (width 0.15) + (type solid) + ) + (layer "F.Fab") + (uuid "66022c8a-1ea6-4c46-bf25-f418961567a0") + ) + (fp_text user "${REFERENCE}" + (at 0 0 0) + (layer "F.Fab") + (uuid "3771af48-88aa-43ef-9adf-0247ae1807cc") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (pad "1" smd rect + (at -2.78 -1.905) + (size 1.91 0.61) + (layers "F.Cu" "F.Mask" "F.Paste") + (uuid "87aefb81-aa1b-47a5-87be-b6ac3fc76547") + ) + (pad "2" smd rect + (at -2.78 -0.635) + (size 1.91 0.61) + (layers "F.Cu" "F.Mask" "F.Paste") + (uuid "2f750416-bf17-4e39-b3bb-f85aa440fd50") + ) + (pad "3" smd rect + (at -2.78 0.635) + (size 1.91 0.61) + (layers "F.Cu" "F.Mask" "F.Paste") + (uuid "36f210d4-850a-42fb-b0e1-65ec6930f597") + ) + (pad "4" smd rect + (at -2.78 1.905) + (size 1.91 0.61) + (layers "F.Cu" "F.Mask" "F.Paste") + (uuid "2d2d8909-917d-4c80-a158-fe3311de7da1") + ) + (pad "5" smd rect + (at 2.78 1.905) + (size 1.91 0.61) + (layers "F.Cu" "F.Mask" "F.Paste") + (uuid "ef9095bf-950e-419f-8852-21dca4fa715a") + ) + (pad "6" smd rect + (at 2.78 0.635) + (size 1.91 0.61) + (layers "F.Cu" "F.Mask" "F.Paste") + (uuid "1a4a214d-2061-4619-b7c0-31242f4641e8") + ) + (pad "7" smd rect + (at 2.78 -0.635) + (size 1.91 0.61) + (layers "F.Cu" "F.Mask" "F.Paste") + (uuid "0cee3308-3b50-4aaa-9e72-edc792efa845") + ) + (pad "8" smd rect + (at 2.78 -1.905) + (size 1.91 0.61) + (layers "F.Cu" "F.Mask" "F.Paste") + (uuid "6ada3559-739a-4e69-8922-5f46c3837109") + ) + (pad "9" smd rect + (at -0.6025 -0.775) + (size 1.205 1.55) + (layers "F.Cu" "F.Mask" "F.Paste") + (solder_paste_margin_ratio -0.2) + (uuid "3dea7421-f9dd-424c-a2f4-f2900864096f") + ) + (pad "9" smd rect + (at -0.6025 0.775) + (size 1.205 1.55) + (layers "F.Cu" "F.Mask" "F.Paste") + (solder_paste_margin_ratio -0.2) + (uuid "73b9759e-a7a0-4881-8dc1-dcebc919dddd") + ) + (pad "9" smd rect + (at 0.6025 -0.775) + (size 1.205 1.55) + (layers "F.Cu" "F.Mask" "F.Paste") + (solder_paste_margin_ratio -0.2) + (uuid "6bd4be4a-30c5-4811-8705-2d3173d4b547") + ) + (pad "9" smd rect + (at 0.6025 0.775) + (size 1.205 1.55) + (layers "F.Cu" "F.Mask" "F.Paste") + (solder_paste_margin_ratio -0.2) + (uuid "c56f497b-0492-4bef-93d8-3e34169b3252") + ) + (embedded_fonts no) + (model "${KICAD10_3DMODEL_DIR}/Package_SO.3dshapes/TI_SO-PowerPAD-8.step" + (offset + (xyz 0 0 0) + ) + (scale + (xyz 1 1 1) + ) + (rotate + (xyz 0 0 0) + ) + ) +)
tps54427ddar.lbr+67−48@@ -50,65 +50,84 @@ <layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/> </layers> <library>-<description>SOIC-8_3.9x4.9mm_P1.27mm (symbol synthesized from footprint pads)</description>+<description></description> <packages>-<package name="SOIC-8_3.9x4.9mm_P1.27mm">- <description>SOIC-8_3.9x4.9mm_P1.27mm</description>- <smd name="1" x="-2.4750" y="1.9050" dx="1.9500" dy="0.6000" layer="1"/>- <smd name="2" x="-2.4750" y="0.6350" dx="1.9500" dy="0.6000" layer="1"/>- <smd name="3" x="-2.4750" y="-0.6350" dx="1.9500" dy="0.6000" layer="1"/>- <smd name="4" x="-2.4750" y="-1.9050" dx="1.9500" dy="0.6000" layer="1"/>- <smd name="5" x="2.4750" y="-1.9050" dx="1.9500" dy="0.6000" layer="1"/>- <smd name="6" x="2.4750" y="-0.6350" dx="1.9500" dy="0.6000" layer="1"/>- <smd name="7" x="2.4750" y="0.6350" dx="1.9500" dy="0.6000" layer="1"/>- <smd name="8" x="2.4750" y="1.9050" dx="1.9500" dy="0.6000" layer="1"/>- <wire x1="-2.0600" y1="2.5600" x2="2.0600" y2="2.5600" width="0.1200" layer="21"/>- <wire x1="-2.0600" y1="2.4650" x2="-2.0600" y2="2.5600" width="0.1200" layer="21"/>- <wire x1="-2.0600" y1="-2.5600" x2="-2.0600" y2="-2.4650" width="0.1200" layer="21"/>- <wire x1="2.0600" y1="2.5600" x2="2.0600" y2="2.4650" width="0.1200" layer="21"/>- <wire x1="2.0600" y1="-2.4650" x2="2.0600" y2="-2.5600" width="0.1200" layer="21"/>- <wire x1="2.0600" y1="-2.5600" x2="-2.0600" y2="-2.5600" width="0.1200" layer="21"/>- <text x="0" y="3.480" size="1.27" layer="25" align="bottom-center">>NAME</text>- <text x="0" y="-3.480" size="1.27" layer="27" align="top-center">>VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-2.6000" y="2.4700"/><vertex x="-2.8400" y="2.8000"/><vertex x="-2.3600" y="2.8000"/></polygon></package>+<package name="TPS54427DDAR">+ <description>TPS54427DDAR</description>+ <smd name="1" x="-2.7800" y="1.9050" dx="1.9100" dy="0.6100" layer="1"/>+ <smd name="2" x="-2.7800" y="0.6350" dx="1.9100" dy="0.6100" layer="1"/>+ <smd name="3" x="-2.7800" y="-0.6350" dx="1.9100" dy="0.6100" layer="1"/>+ <smd name="4" x="-2.7800" y="-1.9050" dx="1.9100" dy="0.6100" layer="1"/>+ <smd name="5" x="2.7800" y="-1.9050" dx="1.9100" dy="0.6100" layer="1"/>+ <smd name="6" x="2.7800" y="-0.6350" dx="1.9100" dy="0.6100" layer="1"/>+ <smd name="7" x="2.7800" y="0.6350" dx="1.9100" dy="0.6100" layer="1"/>+ <smd name="8" x="2.7800" y="1.9050" dx="1.9100" dy="0.6100" layer="1"/>+ <smd name="9" x="-0.6025" y="0.7750" dx="1.2050" dy="1.5500" layer="1"/>+ <smd name="9@2" x="-0.6025" y="-0.7750" dx="1.2050" dy="1.5500" layer="1"/>+ <smd name="9@3" x="0.6025" y="0.7750" dx="1.2050" dy="1.5500" layer="1"/>+ <smd name="9@4" x="0.6025" y="-0.7750" dx="1.2050" dy="1.5500" layer="1"/>+ <polygon width="0.1200" layer="21">+ <vertex x="-2.5000" y="2.5000"/>+ <vertex x="-2.7400" y="2.8300"/>+ <vertex x="-2.2600" y="2.8300"/>+ <vertex x="-2.5000" y="2.5000"/>+ </polygon>+ <wire x1="-2.0750" y1="2.5750" x2="2.0750" y2="2.5750" width="0.1500" layer="21"/>+ <wire x1="-2.0750" y1="-2.5750" x2="2.0750" y2="-2.5750" width="0.1500" layer="21"/>+ <wire x1="-1.9500" y1="1.4500" x2="-0.9500" y2="2.4500" width="0.1500" layer="51"/>+ <wire x1="-1.9500" y1="-2.4500" x2="-1.9500" y2="1.4500" width="0.1500" layer="51"/>+ <wire x1="-0.9500" y1="2.4500" x2="1.9500" y2="2.4500" width="0.1500" layer="51"/>+ <wire x1="1.9500" y1="2.4500" x2="1.9500" y2="-2.4500" width="0.1500" layer="51"/>+ <wire x1="1.9500" y1="-2.4500" x2="-1.9500" y2="-2.4500" width="0.1500" layer="51"/>+ <text x="0" y="3.460" size="1.27" layer="25" align="bottom-center">>NAME</text>+ <text x="0" y="-3.460" size="1.27" layer="27" align="top-center">>VALUE</text>+<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-2.5000" y="2.5000"/><vertex x="-2.7400" y="2.8300"/><vertex x="-2.2600" y="2.8300"/><vertex x="-2.5000" y="2.5000"/></polygon></package> </packages> <symbols>-<symbol name="SOIC-8_3.9x4.9mm_P1.27mm">- <wire x1="-7.62" y1="6.35" x2="7.62" y2="6.35" width="0.254" layer="94"/>- <wire x1="7.62" y1="6.35" x2="7.62" y2="-6.35" width="0.254" layer="94"/>- <wire x1="7.62" y1="-6.35" x2="-7.62" y2="-6.35" width="0.254" layer="94"/>- <wire x1="-7.62" y1="-6.35" x2="-7.62" y2="6.35" width="0.254" layer="94"/>- <text x="0" y="8.89" size="1.27" layer="95" align="bottom-center">>NAME</text>- <text x="0" y="-8.89" size="1.27" layer="96" align="top-center">>VALUE</text>- <pin name="1" x="-12.7" y="5.08" length="short" direction="pas"/>- <pin name="2" x="-12.7" y="2.54" length="short" direction="pas"/>- <pin name="3" x="-12.7" y="0" length="short" direction="pas"/>- <pin name="4" x="-12.7" y="-2.54" length="short" direction="pas"/>- <pin name="5" x="12.7" y="5.08" length="short" direction="pas" rot="R180"/>- <pin name="6" x="12.7" y="2.54" length="short" direction="pas" rot="R180"/>- <pin name="7" x="12.7" y="0" length="short" direction="pas" rot="R180"/>- <pin name="8" x="12.7" y="-2.54" length="short" direction="pas" rot="R180"/>+<symbol name="TPS54427DDAR">+ <wire x1="-12.7" y1="7.62" x2="12.7" y2="7.62" width="0.254" layer="94"/>+ <wire x1="12.7" y1="7.62" x2="12.7" y2="-7.62" width="0.254" layer="94"/>+ <wire x1="12.7" y1="-7.62" x2="-12.7" y2="-7.62" width="0.254" layer="94"/>+ <wire x1="-12.7" y1="-7.62" x2="-12.7" y2="7.62" width="0.254" layer="94"/>+ <text x="0" y="10.16" size="1.27" layer="95" align="bottom-center">>NAME</text>+ <text x="0" y="-10.16" size="1.27" layer="96" align="top-center">>VALUE</text>+ <pin name="EN" x="-17.78" y="5.08" length="middle" direction="in"/>+ <pin name="VFB" x="-17.78" y="2.54" length="middle" direction="in"/>+ <pin name="VREG5" x="-17.78" y="0" length="middle" direction="out"/>+ <pin name="SS" x="-17.78" y="-2.54" length="middle" direction="in"/>+ <pin name="GND" x="-17.78" y="-5.08" length="middle" direction="pwr"/>+ <pin name="PowerPAD" x="17.78" y="2.54" length="middle" direction="pwr" rot="R180"/>+ <pin name="VIN" x="17.78" y="0" length="middle" direction="pwr" rot="R180"/>+ <pin name="VBST" x="17.78" y="-2.54" length="middle" direction="pwr" rot="R180"/>+ <pin name="SW" x="17.78" y="-5.08" length="middle" direction="out" rot="R180"/> </symbol> </symbols> <devicesets>-<deviceset name="SOIC-8_3.9x4.9mm_P1.27mm" prefix="U">- <description>SOIC-8_3.9x4.9mm_P1.27mm (symbol synthesized from footprint pads)</description>+<deviceset name="TPS54427DDAR" prefix="U">+ <description></description> <gates>- <gate name="G$1" symbol="SOIC-8_3.9x4.9mm_P1.27mm" x="0" y="0"/>+ <gate name="G$1" symbol="TPS54427DDAR" x="0" y="0"/> </gates> <devices>- <device name="" package="SOIC-8_3.9x4.9mm_P1.27mm">+ <device name="" package="TPS54427DDAR"> <connects>- <connect gate="G$1" pin="1" pad="1"/>- <connect gate="G$1" pin="2" pad="2"/>- <connect gate="G$1" pin="3" pad="3"/>- <connect gate="G$1" pin="4" pad="4"/>- <connect gate="G$1" pin="5" pad="5"/>- <connect gate="G$1" pin="6" pad="6"/>- <connect gate="G$1" pin="7" pad="7"/>- <connect gate="G$1" pin="8" pad="8"/>+ <connect gate="G$1" pin="EN" pad="1"/>+ <connect gate="G$1" pin="VFB" pad="2"/>+ <connect gate="G$1" pin="VREG5" pad="3"/>+ <connect gate="G$1" pin="SS" pad="4"/>+ <connect gate="G$1" pin="GND" pad="5"/>+ <connect gate="G$1" pin="PowerPAD" pad="9 9@2 9@3 9@4"/>+ <connect gate="G$1" pin="VIN" pad="8"/>+ <connect gate="G$1" pin="VBST" pad="7"/>+ <connect gate="G$1" pin="SW" pad="6"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="TPS54427DDAR" constant="no"/>+ <attribute name="MANUFACTURER" value="Texas Instruments" constant="no"/>+ <attribute name="LCSC_PN" value="C472488" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>