component

TPS389001DSER

Public Made by Adom

by adom

Texas Instruments TPS389001DSER adjustable voltage supervisor with programmable reset delay, manual reset and open-drain output in WSON-6.

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tps389001dser / VALIDATION.md
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John Lauer Use generic component summary and separate validation history b60ff7d 29d ago

TPS389001DSER library validation history

Texas Instruments adjustable 1.15 V supervisor in DSE0006A WSON-6. This page preserves manufacturer originals and the authored source library. Model seating and manufacturing validation remain incomplete.

Manufacturer originals

  • TI datasheet, SLVSD65A, May 2016 electrical revision, with DSE0006A package drawing 4220552/B dated January 2024. Local tps3890.pdf preserves downloaded bytes.
  • Manufacturer family CAD page supplies the original TPS3890_DSE_6.bxl and DSE0006A.stp. The exact orderable query returned no symbol; the documented family/package association identifies the applicable model.
  • Original TI STEP, SHA256 14a47e7abf178da4755a4bbc05c724ca531edd590029a97fa11f6ac0e67ff166. The GLB is an OCCT visualization derivative, with 7 meshes and 3 materials. The original STEP is unchanged.

Pin functions and source symbol

Pin Name Electrical role
1 SENSE Threshold input
2 GND Power return
3 MR, active low Manual-reset input
4 VDD Supply input, recommended 1.5-5.5 V
5 CT Timing-capacitor terminal; modeled passive
6 RESET, active low Open-drain output; modeled open collector

The adom-symbol source groups Monitor, Control, Reset and Supply. Connection endpoints are on the 100 mil grid. symbol-embed.html provides an interactive symbol view. The symbol includes a central vector outline derived from the preserved manufacturer STEP. Virtual model markings and seated-board verification remain separate checks.

Footprint and export status

TPS389001DSER.kicad_mod transcribes the manufacturer's example board/stencil drawings, PDF pages 25-26. The solderable/paste rectangles are 0.8 x 0.25 mm for pad 1 and 0.7 x 0.25 mm for the other pads. Pad 1 extends farther inward and shares the row's outer edge. Pads 1-3 use solder-mask-defined lands with 0.05 mm copper overlap; pads 4-6 use non-solder-mask-defined lands with 0.05 mm mask expansion. land-pattern-intent.json records exact copper, mask and paste dimensions. The package has six terminals and no separate exposed pad. Silk includes an external pad-1 cue; the fab outline includes a corner cue.

The canonical conversion remains a design candidate. Installed adom-lbr 2.39.0 drops all per-pad mask and paste margins. Isolated development commit 19e46a6 preserves those fields, footprint defaults and explicit layer participation through KiCad, and adds signed Altium expansion fields with codec tests. The current supervisor Altium export refuses its unrepresentable rounded-corner value; Fusion explicit aperture export returns an unsupported-feature error. Native desktop parity is still unproven. See adom-lbr issue 25 and aperture-roundtrip-audit.json. The original roundtrip-diagnostic copies lost the attributes and must not be used for fabrication. The newer aperture-candidate/ files preserve them; all remain unqualified. A footprint preview's copper shape alone cannot prove aperture fidelity. InstaPCB mask registration, paste-jet suitability and independent land-pattern review remain open.

The STEP's thin axis is Y: OCCT bounds X +/-0.75 mm, Y -0.025..0.775 mm, Z +/-0.75 mm. PCB rotation, standoff and pin-1 registration are unverified, so the footprint intentionally has no model reference yet. This is a package-model view, not a seated-board preview. Native KiCad/Fusion/Altium parity remains pending.

Circuit and sourcing notes

VDD requires local 0.1 uF decoupling. MR logic thresholds track VDD; a 3.3 V host must not directly assert an assumed valid high when this device is powered from 5 V. RESET needs a pull-up. Select the timing capacitor using the manufacturer datasheet equation and its units, then budget timing and startup limits for the application.

Parts Search snapshot, 9 September 2026: exact Mouser 595-TPS389001DSER reports 2190 units at $1.92 each, with a 112-day lead-time field. Packaging/fulfillment are unconfirmed, and no order or reservation was made. The banner instead recommended DSET; Parts Search issue 8 records that mismatch. DSER is the exact orderable documented on this page. Distributor snapshots are dated evidence, not current availability or a stock reservation; query inventory for the intended build.

Native aperture inspection

Open the interactive native-layer inspection. The three individual KiCad SVG exports retain the native geometry; the inspection HTML changes framing/layer visibility only. Outer widths/heights of all 18 copper/mask/paste shapes match the saved source intent. See aperture-candidate/native-aperture-report.json for measurements and hashes.

Matching dimensions is not full stencil fidelity. KiCad applies the rounded-rectangle ratio to each adjusted aperture size. Pad 1's present mask/paste opening has an approximately 0.0714 mm radius, while TI's example stencil calls out R0.05 typical. Explicit aperture geometry or a reviewed land-pattern revision is still required. No footprint or native parity is released on the strength of this check.

Independent-opening candidate

The newer explicit-aperture-candidate/ retains six named copper terminals and carries twelve unnumbered technical-layer pads for independent mask and paste openings. This prevents KiCad from scaling the opening corner radius with the copper-pad ratio. Inspect the newer native geometry. All twelve native opening sizes and R0.05 mm radii match the saved intent within the SVG's coordinate precision. The six electrical connections remain 1->1 through 6->6. Earlier files and the failing corner example are preserved separately.

The dedicated 5 mm coupon's native DRC reports two copper clearance findings (0.15 mm actual vs default 0.20 mm) and a reference-text edge clipping warning. The detailed native report is authoritative; the service CLI incorrectly summarized zero findings. The InstaPCB skill specifies 0.10 mm minimum spacing, but this coupon did not carry a complete InstaPCB project rule set. This is therefore geometry evidence, not a passing manufacturing DRC. Default ignored checks, including footprint-type mismatch, remain recorded in the native report. Independent copper-land review, native target adapters, model seating and full board qualification remain open.

TMF8829 Depth Lab uses this component. Its circuit choices and project progress are documented there.

Z-up display model

The model-only DSE0006A.adom-zup.glb is a separately named orientation derivative used as the base for the annotated view below. The source STEP and original GLB remain unchanged. zup-display-provenance.json records the source hashes, right-handed axis mapping and 0.025 mm seat offset; all geometry buffers are byte-identical. Adom Z now follows the original source Y, with the terminal floor at Z=0. This display pose is separate from a qualified native footprint model attachment.

An exact-solid OCCT measurement found the source model's five ordinary leads to be 0.35 mm long and its distinctive lead 0.45 mm long. The manufacturer drawing specifies minimums of 0.40 mm and 0.50 mm respectively. Rotation does not resolve this 0.05 mm discrepancy; the original geometry is preserved and is not certified against the drawing.

Footprint reference overlay

The displayed TPS389001DSER.adom-reference-v2.glb adds teal dashed copper-pad boundaries at 50% transparency, white silkscreen contours at 70% transparency and signal names at 50% transparency. Names follow the canonical pin-pad map, with overbars for active-low MR and RESET. The reference plane follows the footprint XY coordinates in Adom Z-up, with a 0.002 mm rendering offset. These separate nonphysical meshes are reference artwork, not manufacturing layers. The uninstantiated REF** placeholder is omitted. The original STEP, original GLB and model-only Z-up derivative remain unchanged. Inspect beneath the body to see occluded pad portions.

Virtual MPN marking

The top-surface TPS389001DSER marking was generated by adom-chip-laser in the separate TPS389001DSER.adom-etched.step derivative. It is an identification aid, not a representation of the factory's actual marking. The annotated GLB preserves the manufacturer's original body, terminal geometry and materials, and imports only the generated light-gray inlay with a documented 0.006 mm display offset to prevent occlusion by the unchanged top surface. TPS389001DSER.adom-marked-display.json records this composition. The etched STEP contains the service's derived bodies/materials; the original DSE0006A.stp remains the authoritative manufacturer download. Native seating and manufacturing qualification remain pending.

MPN marking, source and license

Mark location: Clear top face of the supervisor housing; existing reviewed MPN inlay retained. The exact MPN is a virtual identification inlay generated by adom-chip-laser, not a claim about the manufacturer's actual package marking. The physical source model and reference-artwork geometry remain unchanged.

The Source field links to the manufacturer/reference authority. Generation tools such as adom-lbr, adom-symbol, step2glb and Adom Chip Laser are recorded separately in artifact provenance. Original Adom-authored content defaults to the MIT open-source license; manufacturer and upstream assets retain their original terms and attribution. See license scope. Native CAD parity and manufacturing qualification are separate checks.

Cached chip artwork

These reusable chip previews and symbol outlines retain the reviewed Z-up pose and virtual MPN placement. Read the manifest before generating new artwork; compare its source hashes before reuse. Electrical and native model-seating qualification remain separate.

Loads on click. Unloads only if this page sits in the background.

Cache manifest and generation recipe · Original manufacturer STEP