TLC0832CP

Texas Instruments · Analog To Digital Converters (ADC) · PDIP-8

TLC0832CP from Texas Instruments, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	CS	input	Active-low chip select: pulling CS low enables the logic and starts a conversion, CS must be held low for the complete conversion, and returning it high clears the internal registers and puts DO into high impedance (CS high pulse width at least 220 ns).
2	CH0	input	Analog multiplexer input channel 0, usable as a single-ended input referenced to GND or as the positive or negative terminal of a differential pair, with common-mode input range of -0.05 V to VCC+0.05 V.
3	CH1	input	Analog multiplexer input channel 1, usable as a single-ended input referenced to GND or as the negative or positive terminal of a differential pair, with common-mode input range of -0.05 V to VCC+0.05 V.
4	GND	power_in	Network ground terminal; all voltages except differential voltages are referenced to this pin.
5	DI	input	Serial data input that shifts the start bit and multiplexer address word in on CLK rising edges (data valid 350 ns setup and 90 ns hold before/after CLK↑), and is ignored during conversion so it can be tied to DO for single-wire bidirectional use.
6	DO	tri_state	Serial data output that leaves high impedance after the one-clock MUX settling period, sends MSB-first conversion data followed by LSB-first data, and returns to high impedance when CS goes high.
7	CLK	input	Serial clock input operating from 10 kHz to 600 kHz with a 40% to 60% duty cycle; outside that duty-cycle range the minimum high or low pulse width is 1 µs.
8	VCC/REF	power_in	Supply pin specified at 4.5 V to 5.5 V (5 V nominal) that also serves as the voltage reference, internally tied to VCC on the TLC0832.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	PDIP-8
Category	Data Acquisition
Pins	8

CAD (KiCad official)

Symbol: TLC0832CP
Footprint: Package_DIP:DIP-8_W7.62mm
3D model: PDIP-8 (KiCad packages3D, STEP)
3D model files: tlc0832cp-etched.step / tlc0832cp-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlc0832cp.step / tlc0832cp.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (21 pp, sha256 0af85a1e9ea62978, retrieved 2026-10-08, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

# TLC0832CP

**Texas Instruments** · Analog To Digital Converters (ADC) · PDIP-8

TLC0832CP from Texas Instruments, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | input | Active-low chip select: pulling CS low enables the logic and starts a conversion, CS must be held low for the complete conversion, and returning it high clears the internal registers and puts DO into high impedance (CS high pulse width at least 220 ns). |
| 2 | CH0 | input | Analog multiplexer input channel 0, usable as a single-ended input referenced to GND or as the positive or negative terminal of a differential pair, with common-mode input range of -0.05 V to VCC+0.05 V. |
| 3 | CH1 | input | Analog multiplexer input channel 1, usable as a single-ended input referenced to GND or as the negative or positive terminal of a differential pair, with common-mode input range of -0.05 V to VCC+0.05 V. |
| 4 | GND | power_in | Network ground terminal; all voltages except differential voltages are referenced to this pin. |
| 5 | DI | input | Serial data input that shifts the start bit and multiplexer address word in on CLK rising edges (data valid 350 ns setup and 90 ns hold before/after CLK↑), and is ignored during conversion so it can be tied to DO for single-wire bidirectional use. |
| 6 | DO | tri_state | Serial data output that leaves high impedance after the one-clock MUX settling period, sends MSB-first conversion data followed by LSB-first data, and returns to high impedance when CS goes high. |
| 7 | CLK | input | Serial clock input operating from 10 kHz to 600 kHz with a 40% to 60% duty cycle; outside that duty-cycle range the minimum high or low pulse width is 1 µs. |
| 8 | VCC/REF | power_in | Supply pin specified at 4.5 V to 5.5 V (5 V nominal) that also serves as the voltage reference, internally tied to VCC on the TLC0832. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | PDIP-8 |
| Category | Data Acquisition |
| Pins | 8 |

## CAD (KiCad official)

- Symbol: `TLC0832CP`
- Footprint: `Package_DIP:DIP-8_W7.62mm`
- 3D model: PDIP-8 (KiCad packages3D, STEP)
- 3D model files: `tlc0832cp-etched.step` / `tlc0832cp-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlc0832cp.step` / `tlc0832cp.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tlc0831) (21 pp, sha256 `0af85a1e9ea62978`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tlc0832cp-datasheet.pdf)