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TLC0832CP
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Texas Instruments Analog To Digital Converters (ADC), PDIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+44@@ -0,0 +1,44 @@+# TLC0832CP++**Texas Instruments** · Analog To Digital Converters (ADC) · PDIP-8++TLC0832CP from Texas Instruments, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | CS | input | Active-low chip select: pulling CS low enables the logic and starts a conversion, CS must be held low for the complete conversion, and returning it high clears the internal registers and puts DO into high impedance (CS high pulse width at least 220 ns). |+| 2 | CH0 | input | Analog multiplexer input channel 0, usable as a single-ended input referenced to GND or as the positive or negative terminal of a differential pair, with common-mode input range of -0.05 V to VCC+0.05 V. |+| 3 | CH1 | input | Analog multiplexer input channel 1, usable as a single-ended input referenced to GND or as the negative or positive terminal of a differential pair, with common-mode input range of -0.05 V to VCC+0.05 V. |+| 4 | GND | power_in | Network ground terminal; all voltages except differential voltages are referenced to this pin. |+| 5 | DI | input | Serial data input that shifts the start bit and multiplexer address word in on CLK rising edges (data valid 350 ns setup and 90 ns hold before/after CLK↑), and is ignored during conversion so it can be tied to DO for single-wire bidirectional use. |+| 6 | DO | tri_state | Serial data output that leaves high impedance after the one-clock MUX settling period, sends MSB-first conversion data followed by LSB-first data, and returns to high impedance when CS goes high. |+| 7 | CLK | input | Serial clock input operating from 10 kHz to 600 kHz with a 40% to 60% duty cycle; outside that duty-cycle range the minimum high or low pulse width is 1 µs. |+| 8 | VCC/REF | power_in | Supply pin specified at 4.5 V to 5.5 V (5 V nominal) that also serves as the voltage reference, internally tied to VCC on the TLC0832. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | PDIP-8 |+| Category | Data Acquisition |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `TLC0832CP`+- Footprint: `Package_DIP:DIP-8_W7.62mm`+- 3D model: PDIP-8 (KiCad packages3D, STEP)+- 3D model files: `tlc0832cp-etched.step` / `tlc0832cp-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlc0832cp.step` / `tlc0832cp.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tlc0831) (21 pp, sha256 `0af85a1e9ea62978`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tlc0832cp-datasheet.pdf)
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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "data acquisition",+ "tlc0832cp",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tlc0832cp.kicad_sym",+ "tlc0832cp.kicad_mod",+ "tlc0832cp.glb",+ "tlc0832cp.step",+ "tlc0832cp.lbr",+ "docs/hero.png",+ "docs/tlc0832cp-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tlc0832cp-hero.glb",+ "tlc0832cp-hero.overlay.json"+ ],+ "component": {+ "mpn": "TLC0832CP",+ "manufacturer": "Texas Instruments",+ "package": "PDIP-8",+ "pin_count": 8,+ "category": "Data Acquisition",+ "subcategory": "Analog To Digital Converters (ADC)",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tlc0831",+ "parts": {+ "symbol": "tlc0832cp.kicad_sym",+ "footprint": "tlc0832cp.kicad_mod",+ "model_3d": "tlc0832cp-hero.glb",+ "model_3d_plain": "tlc0832cp.glb",+ "model_3d_step": "tlc0832cp-etched.step",+ "model_3d_step_plain": "tlc0832cp.step",+ "lbr": "tlc0832cp.lbr"+ },+ "distributor_links": {+ "lcsc": "C1542822",+ "digikey": "2156-TLC0832CP-ND",+ "mouser": "595-TLC0832CP"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T18:32:21Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "2156-TLC0832CP-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-TLC0832CP",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "CS",+ "type": "input",+ "description": "Active-low chip select: pulling CS low enables the logic and starts a conversion, CS must be held low for the complete conversion, and returning it high clears the internal registers and puts DO into high impedance (CS high pulse width at least 220 ns)."+ },+ {+ "number": "2",+ "name": "CH0",+ "type": "input",+ "description": "Analog multiplexer input channel 0, usable as a single-ended input referenced to GND or as the positive or negative terminal of a differential pair, with common-mode input range of -0.05 V to VCC+0.05 V."+ },+ {+ "number": "3",+ "name": "CH1",+ "type": "input",+ "description": "Analog multiplexer input channel 1, usable as a single-ended input referenced to GND or as the negative or positive terminal of a differential pair, with common-mode input range of -0.05 V to VCC+0.05 V."+ },+ {+ "number": "4",+ "name": "GND",+ "type": "power_in",+ "description": "Network ground terminal; all voltages except differential voltages are referenced to this pin."+ },+ {+ "number": "5",+ "name": "DI",+ "type": "input",+ "description": "Serial data input that shifts the start bit and multiplexer address word in on CLK rising edges (data valid 350 ns setup and 90 ns hold before/after CLK↑), and is ignored during conversion so it can be tied to DO for single-wire bidirectional use."+ },+ {+ "number": "6",+ "name": "DO",+ "type": "tri_state",+ "description": "Serial data output that leaves high impedance after the one-clock MUX settling period, sends MSB-first conversion data followed by LSB-first data, and returns to high impedance when CS goes high."+ },+ {+ "number": "7",+ "name": "CLK",+ "type": "input",+ "description": "Serial clock input operating from 10 kHz to 600 kHz with a 40% to 60% duty cycle; outside that duty-cycle range the minimum high or low pulse width is 1 µs."+ },+ {+ "number": "8",+ "name": "VCC/REF",+ "type": "power_in",+ "description": "Supply pin specified at 4.5 V to 5.5 V (5 V nominal) that also serves as the voltage reference, internally tied to VCC on the TLC0832."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The datasheet gives the TLC0832 D and P (PDIP) pinout in a single TOP VIEW diagram, and the P packag; Pin 8 is printed as VCC/REF and has two functions. It is typed power_in as the supply, and the refer; Pin types for CH0 and CH1 are set to input because the datasheet describes them as analog inputs and"+ ],+ "pages_sent": 21,+ "cost_usd": 0.0872,+ "at": "2026-10-08T18:32:02"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tlc0831",+ "pages": 21,+ "sha256": "0af85a1e9ea62978",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "tlc0832cp.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "body on z = 0, through-hole leads below",+ "extents_mm": [+ 7.874,+ 9.27,+ 6.98+ ],+ "zmin_mm": -3.3,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "4a377a56a8d9e9c0b86c095ef9ecc1869ac19e7f5069a3247b294250bf4f235d",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "tlc0832cp-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "body on z = 0, through-hole leads below",+ "extents_mm": [+ 7.874,+ 9.27,+ 6.98+ ],+ "zmin_mm": -3.3,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "e63834f878b560ef0479bfed4d2d4ef8f3337cc4c0fcabf25e455e2ac8b36616",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}