# STM8S208RBT3

**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM8S208RBT3 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NRST | bidirectional | Reset pin (I/O); its reset-state behaviour and electrical limits are given in the NRST / reset pin characteristics section. |
| 2 | PA1/OSCIN | bidirectional | Port A1 doubles as the resonator/crystal oscillator input (OSCIN) with slow-speed output capability (O1, up to 2 MHz). |
| 3 | PA2/OSCOUT | bidirectional | Port A2 doubles as the resonator/crystal oscillator output (OSCOUT) with slow-speed output capability (O1, up to 2 MHz). |
| 4 | VSSIO_1 | power_in | I/O ground. |
| 5 | VSS | power_in | Digital ground. |
| 6 | VCAP | power_in | 1.8 V regulator capacitor pin; an external capacitor is required as specified in the VCAP external capacitor section. |
| 7 | VDD | power_in | Digital power supply. |
| 8 | VDDIO_1 | power_in | I/O power supply. |
| 9 | PA3/TIM2_CH3 | bidirectional | Port A3 with default alternate function TIM2 channel 3; alternate function after remap is TIM3_CH1 (AFR1 option bit), slow-speed output (O1). |
| 10 | PA4/UART1_RX | bidirectional | Port A4 used as UART1 receive, high sink capable (HS) with speed O3; its default state is controlled by the ROM bootloader (pulled up during bootloader activation, returned to floating before bootloader exit). |
| 11 | PA5/UART1_TX | bidirectional | Port A5 used as UART1 transmit, high sink capable (HS) with speed O3. |
| 12 | PA6/UART1_CK | bidirectional | Port A6 used as UART1 synchronous clock, high sink capable (HS) with speed O3. |
| 13 | PF7/AIN15 | bidirectional | Port F7 with ADC analog input 15, slow-speed output (O1). |
| 14 | PF6/AIN14 | bidirectional | Port F6 with ADC analog input 14, slow-speed output (O1). |
| 15 | PF5/AIN13 | bidirectional | Port F5 with ADC analog input 13, slow-speed output (O1). |
| 16 | PF4/AIN12 | bidirectional | Port F4 with ADC analog input 12, slow-speed output (O1). |
| 17 | PF3/AIN11 | bidirectional | Port F3 with ADC analog input 11, slow-speed output (O1). |
| 18 | VREF+ | power_in | ADC positive reference voltage. |
| 19 | VDDA | power_in | Analog power supply. |
| 20 | VSSA | power_in | Analog ground. |
| 21 | VREF- | power_in | ADC negative reference voltage. |
| 22 | PF0/AIN10 | bidirectional | Port F0 with ADC analog input 10, slow-speed output (O1). |
| 23 | PB7/AIN7 | bidirectional | Port B7 with ADC analog input 7, slow-speed output (O1). |
| 24 | PB6/AIN6 | bidirectional | Port B6 with ADC analog input 6, slow-speed output (O1). |
| 25 | PB5/AIN5 | bidirectional | Port B5 with ADC analog input 5; I2C_SDA is available as a remapped alternate function (AFR6). |
| 26 | PB4/AIN4 | bidirectional | Port B4 with ADC analog input 4; I2C_SCL is available as a remapped alternate function (AFR6). |
| 27 | PB3/AIN3 | bidirectional | Port B3 with ADC analog input 3; TIM1_ETR is available as a remapped alternate function (AFR5). |
| 28 | PB2/AIN2 | bidirectional | Port B2 with ADC analog input 2; TIM1_CH3N is available as a remapped alternate function (AFR5). |
| 29 | PB1/AIN1 | bidirectional | Port B1 with ADC analog input 1; TIM1_CH2N is available as a remapped alternate function (AFR5). |
| 30 | PB0/AIN0 | bidirectional | Port B0 with ADC analog input 0; TIM1_CH1N is available as a remapped alternate function (AFR5). |
| 31 | PE7/AIN8 | bidirectional | Port E7 with ADC analog input 8, slow-speed output (O1). |
| 32 | PE6/AIN9 | bidirectional | Port E6 with ADC analog input 9, slow-speed output (O1). |
| 33 | PE5/SPI_NSS | bidirectional | Port E5 used as SPI master/slave select, slow-speed output (O1). |
| 34 | PC1/TIM1_CH1 | bidirectional | Port C1 used as Timer 1 channel 1, high sink capable (HS) with speed O3. |
| 35 | PC2/TIM1_CH2 | bidirectional | Port C2 used as Timer 1 channel 2, high sink capable (HS) with speed O3. |
| 36 | PC3/TIM1_CH3 | bidirectional | Port C3 used as Timer 1 channel 3, high sink capable (HS) with speed O3. |
| 37 | PC4/TIM1_CH4 | bidirectional | Port C4 used as Timer 1 channel 4, high sink capable (HS) with speed O3. |
| 38 | PC5/SPI_SCK | bidirectional | Port C5 used as SPI clock, high sink capable (HS) with speed O3. |
| 39 | VSSIO_2 | power_in | I/O ground. |
| 40 | VDDIO_2 | power_in | I/O power supply. |
| 41 | PC6/SPI_MOSI | bidirectional | Port C6 used as SPI master out / slave in, high sink capable (HS) with speed O3. |
| 42 | PC7/SPI_MISO | bidirectional | Port C7 used as SPI master in / slave out, high sink capable (HS) with speed O3. |
| 43 | PG0/CAN_TX | bidirectional | Port G0 used as beCAN transmit (available on STM8S208xx devices only), slow-speed output (O1). |
| 44 | PG1/CAN_RX | bidirectional | Port G1 used as beCAN receive (available on STM8S208xx devices only), slow-speed output (O1). |
| 45 | PG2 | bidirectional | Port G2 general-purpose I/O with slow-speed output (O1). |
| 46 | PG3 | bidirectional | Port G3 general-purpose I/O with slow-speed output (O1). |
| 47 | PG4 | bidirectional | Port G4 general-purpose I/O with slow-speed output (O1). |
| 48 | PI0 | bidirectional | Port I0 general-purpose I/O with slow-speed output (O1). |
| 49 | PG5 | bidirectional | Port G5 general-purpose I/O with slow-speed output (O1). |
| 50 | PG6 | bidirectional | Port G6 general-purpose I/O with slow-speed output (O1). |
| 51 | PG7 | bidirectional | Port G7 general-purpose I/O with slow-speed output (O1). |
| 52 | PE4 | bidirectional | Port E4 general-purpose I/O with slow-speed output (O1). |
| 53 | PE3/TIM1_BKIN | bidirectional | Port E3 used as Timer 1 break input, slow-speed output (O1). |
| 54 | PE2/I2C_SDA | bidirectional | Port E2 used as I2C data; a true open-drain pin (P-buffer, weak pull-up and protection diode to VDD not implemented). |
| 55 | PE1/I2C_SCL | bidirectional | Port E1 used as I2C clock; a true open-drain pin (P-buffer, weak pull-up and protection diode to VDD not implemented). |
| 56 | PE0/CLK_CCO | bidirectional | Port E0 used as configurable clock output, high sink capable (HS) with speed O3. |
| 57 | PD0/TIM3_CH2 | bidirectional | Port D0 used as Timer 3 channel 2, high sink capable (HS) with speed O3; remap options are TIM1_BKIN (AFR3) and CLK_CCO (AFR2). |
| 58 | PD1/SWIM | bidirectional | Port D1 used as SWIM data interface, high sink capable (HS); it is in input pull-up during the reset phase and after internal reset release. |
| 59 | PD2/TIM3_CH1 | bidirectional | Port D2 used as Timer 3 channel 1, high sink capable (HS) with speed O3; remap option is TIM2_CH3 (AFR1). |
| 60 | PD3/TIM2_CH2 | bidirectional | Port D3 used as Timer 2 channel 2, high sink capable (HS) with speed O3; remap option is ADC_ETR (AFR0). |
| 61 | PD4/TIM2_CH1/BEEP | bidirectional | Port D4 used as Timer 2 channel 1, high sink capable (HS) with speed O3; remap option is BEEP output (AFR7). |
| 62 | PD5/UART3_TX | bidirectional | Port D5 used as UART3 data transmit, slow-speed output (O1). |
| 63 | PD6/UART3_RX | bidirectional | Port D6 used as UART3 data receive; its default state is controlled by the ROM bootloader (pulled up during bootloader activation, returned to floating before bootloader exit). |
| 64 | PD7/TLI | bidirectional | Port D7 used as top level interrupt, slow-speed output (O1); remap option is TIM1_CH4 (AFR4), available on the 44-pin package only. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |

## CAD (KiCad official)

- Symbol: `STM8S208RBT3`
- Footprint: `Package_QFP:LQFP-64_10x10mm_P0.5mm`
- 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files: `stm8s208rbt3-etched.step` / `stm8s208rbt3-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm8s208rbt3.step` / `stm8s208rbt3.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588922204478451712) (117 pp, sha256 `7adeaa849cf9e22f`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/stm8s208rbt3-datasheet.pdf)