component
STM8S208RBT3
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+100@@ -0,0 +1,100 @@+# STM8S208RBT3++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)++STM8S208RBT3 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | NRST | bidirectional | Reset pin (I/O); its reset-state behaviour and electrical limits are given in the NRST / reset pin characteristics section. |+| 2 | PA1/OSCIN | bidirectional | Port A1 doubles as the resonator/crystal oscillator input (OSCIN) with slow-speed output capability (O1, up to 2 MHz). |+| 3 | PA2/OSCOUT | bidirectional | Port A2 doubles as the resonator/crystal oscillator output (OSCOUT) with slow-speed output capability (O1, up to 2 MHz). |+| 4 | VSSIO_1 | power_in | I/O ground. |+| 5 | VSS | power_in | Digital ground. |+| 6 | VCAP | power_in | 1.8 V regulator capacitor pin; an external capacitor is required as specified in the VCAP external capacitor section. |+| 7 | VDD | power_in | Digital power supply. |+| 8 | VDDIO_1 | power_in | I/O power supply. |+| 9 | PA3/TIM2_CH3 | bidirectional | Port A3 with default alternate function TIM2 channel 3; alternate function after remap is TIM3_CH1 (AFR1 option bit), slow-speed output (O1). |+| 10 | PA4/UART1_RX | bidirectional | Port A4 used as UART1 receive, high sink capable (HS) with speed O3; its default state is controlled by the ROM bootloader (pulled up during bootloader activation, returned to floating before bootloader exit). |+| 11 | PA5/UART1_TX | bidirectional | Port A5 used as UART1 transmit, high sink capable (HS) with speed O3. |+| 12 | PA6/UART1_CK | bidirectional | Port A6 used as UART1 synchronous clock, high sink capable (HS) with speed O3. |+| 13 | PF7/AIN15 | bidirectional | Port F7 with ADC analog input 15, slow-speed output (O1). |+| 14 | PF6/AIN14 | bidirectional | Port F6 with ADC analog input 14, slow-speed output (O1). |+| 15 | PF5/AIN13 | bidirectional | Port F5 with ADC analog input 13, slow-speed output (O1). |+| 16 | PF4/AIN12 | bidirectional | Port F4 with ADC analog input 12, slow-speed output (O1). |+| 17 | PF3/AIN11 | bidirectional | Port F3 with ADC analog input 11, slow-speed output (O1). |+| 18 | VREF+ | power_in | ADC positive reference voltage. |+| 19 | VDDA | power_in | Analog power supply. |+| 20 | VSSA | power_in | Analog ground. |+| 21 | VREF- | power_in | ADC negative reference voltage. |+| 22 | PF0/AIN10 | bidirectional | Port F0 with ADC analog input 10, slow-speed output (O1). |+| 23 | PB7/AIN7 | bidirectional | Port B7 with ADC analog input 7, slow-speed output (O1). |+| 24 | PB6/AIN6 | bidirectional | Port B6 with ADC analog input 6, slow-speed output (O1). |+| 25 | PB5/AIN5 | bidirectional | Port B5 with ADC analog input 5; I2C_SDA is available as a remapped alternate function (AFR6). |+| 26 | PB4/AIN4 | bidirectional | Port B4 with ADC analog input 4; I2C_SCL is available as a remapped alternate function (AFR6). |+| 27 | PB3/AIN3 | bidirectional | Port B3 with ADC analog input 3; TIM1_ETR is available as a remapped alternate function (AFR5). |+| 28 | PB2/AIN2 | bidirectional | Port B2 with ADC analog input 2; TIM1_CH3N is available as a remapped alternate function (AFR5). |+| 29 | PB1/AIN1 | bidirectional | Port B1 with ADC analog input 1; TIM1_CH2N is available as a remapped alternate function (AFR5). |+| 30 | PB0/AIN0 | bidirectional | Port B0 with ADC analog input 0; TIM1_CH1N is available as a remapped alternate function (AFR5). |+| 31 | PE7/AIN8 | bidirectional | Port E7 with ADC analog input 8, slow-speed output (O1). |+| 32 | PE6/AIN9 | bidirectional | Port E6 with ADC analog input 9, slow-speed output (O1). |+| 33 | PE5/SPI_NSS | bidirectional | Port E5 used as SPI master/slave select, slow-speed output (O1). |+| 34 | PC1/TIM1_CH1 | bidirectional | Port C1 used as Timer 1 channel 1, high sink capable (HS) with speed O3. |+| 35 | PC2/TIM1_CH2 | bidirectional | Port C2 used as Timer 1 channel 2, high sink capable (HS) with speed O3. |+| 36 | PC3/TIM1_CH3 | bidirectional | Port C3 used as Timer 1 channel 3, high sink capable (HS) with speed O3. |+| 37 | PC4/TIM1_CH4 | bidirectional | Port C4 used as Timer 1 channel 4, high sink capable (HS) with speed O3. |+| 38 | PC5/SPI_SCK | bidirectional | Port C5 used as SPI clock, high sink capable (HS) with speed O3. |+| 39 | VSSIO_2 | power_in | I/O ground. |+| 40 | VDDIO_2 | power_in | I/O power supply. |+| 41 | PC6/SPI_MOSI | bidirectional | Port C6 used as SPI master out / slave in, high sink capable (HS) with speed O3. |+| 42 | PC7/SPI_MISO | bidirectional | Port C7 used as SPI master in / slave out, high sink capable (HS) with speed O3. |+| 43 | PG0/CAN_TX | bidirectional | Port G0 used as beCAN transmit (available on STM8S208xx devices only), slow-speed output (O1). |+| 44 | PG1/CAN_RX | bidirectional | Port G1 used as beCAN receive (available on STM8S208xx devices only), slow-speed output (O1). |+| 45 | PG2 | bidirectional | Port G2 general-purpose I/O with slow-speed output (O1). |+| 46 | PG3 | bidirectional | Port G3 general-purpose I/O with slow-speed output (O1). |+| 47 | PG4 | bidirectional | Port G4 general-purpose I/O with slow-speed output (O1). |+| 48 | PI0 | bidirectional | Port I0 general-purpose I/O with slow-speed output (O1). |+| 49 | PG5 | bidirectional | Port G5 general-purpose I/O with slow-speed output (O1). |+| 50 | PG6 | bidirectional | Port G6 general-purpose I/O with slow-speed output (O1). |+| 51 | PG7 | bidirectional | Port G7 general-purpose I/O with slow-speed output (O1). |+| 52 | PE4 | bidirectional | Port E4 general-purpose I/O with slow-speed output (O1). |+| 53 | PE3/TIM1_BKIN | bidirectional | Port E3 used as Timer 1 break input, slow-speed output (O1). |+| 54 | PE2/I2C_SDA | bidirectional | Port E2 used as I2C data; a true open-drain pin (P-buffer, weak pull-up and protection diode to VDD not implemented). |+| 55 | PE1/I2C_SCL | bidirectional | Port E1 used as I2C clock; a true open-drain pin (P-buffer, weak pull-up and protection diode to VDD not implemented). |+| 56 | PE0/CLK_CCO | bidirectional | Port E0 used as configurable clock output, high sink capable (HS) with speed O3. |+| 57 | PD0/TIM3_CH2 | bidirectional | Port D0 used as Timer 3 channel 2, high sink capable (HS) with speed O3; remap options are TIM1_BKIN (AFR3) and CLK_CCO (AFR2). |+| 58 | PD1/SWIM | bidirectional | Port D1 used as SWIM data interface, high sink capable (HS); it is in input pull-up during the reset phase and after internal reset release. |+| 59 | PD2/TIM3_CH1 | bidirectional | Port D2 used as Timer 3 channel 1, high sink capable (HS) with speed O3; remap option is TIM2_CH3 (AFR1). |+| 60 | PD3/TIM2_CH2 | bidirectional | Port D3 used as Timer 2 channel 2, high sink capable (HS) with speed O3; remap option is ADC_ETR (AFR0). |+| 61 | PD4/TIM2_CH1/BEEP | bidirectional | Port D4 used as Timer 2 channel 1, high sink capable (HS) with speed O3; remap option is BEEP output (AFR7). |+| 62 | PD5/UART3_TX | bidirectional | Port D5 used as UART3 data transmit, slow-speed output (O1). |+| 63 | PD6/UART3_RX | bidirectional | Port D6 used as UART3 data receive; its default state is controlled by the ROM bootloader (pulled up during bootloader activation, returned to floating before bootloader exit). |+| 64 | PD7/TLI | bidirectional | Port D7 used as top level interrupt, slow-speed output (O1); remap option is TIM1_CH4 (AFR4), available on the 44-pin package only. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | LQFP-64(10x10) |+| Category | Embedded Processors & Controllers |+| Pins | 64 |++## CAD (KiCad official)++- Symbol: `STM8S208RBT3`+- Footprint: `Package_QFP:LQFP-64_10x10mm_P0.5mm`+- 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)+- 3D model files: `stm8s208rbt3-etched.step` / `stm8s208rbt3-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm8s208rbt3.step` / `stm8s208rbt3.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588922204478451712) (117 pp, sha256 `7adeaa849cf9e22f`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm8s208rbt3-datasheet.pdf)
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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "stm8s208rbt3",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "stm8s208rbt3.kicad_sym",+ "stm8s208rbt3.kicad_mod",+ "stm8s208rbt3.glb",+ "stm8s208rbt3.step",+ "stm8s208rbt3.lbr",+ "docs/hero.png",+ "docs/stm8s208rbt3-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "stm8s208rbt3-hero.glb",+ "stm8s208rbt3-hero.overlay.json"+ ],+ "component": {+ "mpn": "STM8S208RBT3",+ "manufacturer": "STMicroelectronics",+ "package": "LQFP-64(10x10)",+ "pin_count": 64,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588922204478451712",+ "parts": {+ "symbol": "stm8s208rbt3.kicad_sym",+ "footprint": "stm8s208rbt3.kicad_mod",+ "model_3d": "stm8s208rbt3-hero.glb",+ "model_3d_plain": "stm8s208rbt3.glb",+ "model_3d_step": "stm8s208rbt3-etched.step",+ "model_3d_step_plain": "stm8s208rbt3.step",+ "lbr": "stm8s208rbt3.lbr"+ },+ "distributor_links": {+ "lcsc": "C1338476",+ "digikey": "497-16860-ND",+ "mouser": "511-STM8S208RBT3"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T04:29:34Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-16860-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "511-STM8S208RBT3",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "NRST",+ "type": "bidirectional",+ "description": "Reset pin (I/O); its reset-state behaviour and electrical limits are given in the NRST / reset pin characteristics section."+ },+ {+ "number": "2",+ "name": "PA1/OSCIN",+ "type": "bidirectional",+ "description": "Port A1 doubles as the resonator/crystal oscillator input (OSCIN) with slow-speed output capability (O1, up to 2 MHz)."+ },+ {+ "number": "3",+ "name": "PA2/OSCOUT",+ "type": "bidirectional",+ "description": "Port A2 doubles as the resonator/crystal oscillator output (OSCOUT) with slow-speed output capability (O1, up to 2 MHz)."+ },+ {+ "number": "4",+ "name": "VSSIO_1",+ "type": "power_in",+ "description": "I/O ground."+ },+ {+ "number": "5",+ "name": "VSS",+ "type": "power_in",+ "description": "Digital ground."+ },+ {+ "number": "6",+ "name": "VCAP",+ "type": "power_in",+ "description": "1.8 V regulator capacitor pin; an external capacitor is required as specified in the VCAP external capacitor section."+ },+ {+ "number": "7",+ "name": "VDD",+ "type": "power_in",+ "description": "Digital power supply."+ },+ {+ "number": "8",+ "name": "VDDIO_1",+ "type": "power_in",+ "description": "I/O power supply."+ },+ {+ "number": "9",+ "name": "PA3/TIM2_CH3",+ "type": "bidirectional",+ "description": "Port A3 with default alternate function TIM2 channel 3; alternate function after remap is TIM3_CH1 (AFR1 option bit), slow-speed output (O1)."+ },+ {+ "number": "10",+ "name": "PA4/UART1_RX",+ "type": "bidirectional",+ "description": "Port A4 used as UART1 receive, high sink capable (HS) with speed O3; its default state is controlled by the ROM bootloader (pulled up during bootloader activation, returned to floating before bootloader exit)."+ },+ {+ "number": "11",+ "name": "PA5/UART1_TX",+ "type": "bidirectional",+ "description": "Port A5 used as UART1 transmit, high sink capable (HS) with speed O3."+ },+ {+ "number": "12",+ "name": "PA6/UART1_CK",+ "type": "bidirectional",+ "description": "Port A6 used as UART1 synchronous clock, high sink capable (HS) with speed O3."+ },+ {+ "number": "13",+ "name": "PF7/AIN15",+ "type": "bidirectional",+ "description": "Port F7 with ADC analog input 15, slow-speed output (O1)."+ },+ {+ "number": "14",+ "name": "PF6/AIN14",+ "type": "bidirectional",+ "description": "Port F6 with ADC analog input 14, slow-speed output (O1)."+ },+ {+ "number": "15",+ "name": "PF5/AIN13",+ "type": "bidirectional",+ "description": "Port F5 with ADC analog input 13, slow-speed output (O1)."+ },+ {+ "number": "16",+ "name": "PF4/AIN12",+ "type": "bidirectional",+ "description": "Port F4 with ADC analog input 12, slow-speed output (O1)."+ },+ {+ "number": "17",+ "name": "PF3/AIN11",+ "type": "bidirectional",+ "description": "Port F3 with ADC analog input 11, slow-speed output (O1)."+ },+ {+ "number": "18",+ "name": "VREF+",+ "type": "power_in",+ "description": "ADC positive reference voltage."+ },+ {+ "number": "19",+ "name": "VDDA",+ "type": "power_in",+ "description": "Analog power supply."+ },+ {+ "number": "20",+ "name": "VSSA",+ "type": "power_in",+ "description": "Analog ground."+ },+ {+ "number": "21",+ "name": "VREF-",+ "type": "power_in",+ "description": "ADC negative reference voltage."+ },+ {+ "number": "22",+ "name": "PF0/AIN10",+ "type": "bidirectional",+ "description": "Port F0 with ADC analog input 10, slow-speed output (O1)."+ },+ {+ "number": "23",+ "name": "PB7/AIN7",+ "type": "bidirectional",+ "description": "Port B7 with ADC analog input 7, slow-speed output (O1)."+ },+ {+ "number": "24",+ "name": "PB6/AIN6",+ "type": "bidirectional",+ "description": "Port B6 with ADC analog input 6, slow-speed output (O1)."+ },+ {+ "number": "25",+ "name": "PB5/AIN5",+ "type": "bidirectional",+ "description": "Port B5 with ADC analog input 5; I2C_SDA is available as a remapped alternate function (AFR6)."+ },+ {+ "number": "26",+ "name": "PB4/AIN4",+ "type": "bidirectional",+ "description": "Port B4 with ADC analog input 4; I2C_SCL is available as a remapped alternate function (AFR6)."+ },+ {+ "number": "27",+ "name": "PB3/AIN3",+ "type": "bidirectional",+ "description": "Port B3 with ADC analog input 3; TIM1_ETR is available as a remapped alternate function (AFR5)."+ },+ {+ "number": "28",+ "name": "PB2/AIN2",+ "type": "bidirectional",+ "description": "Port B2 with ADC analog input 2; TIM1_CH3N is available as a remapped alternate function (AFR5)."+ },+ {+ "number": "29",+ "name": "PB1/AIN1",+ "type": "bidirectional",+ "description": "Port B1 with ADC analog input 1; TIM1_CH2N is available as a remapped alternate function (AFR5)."+ },+ {+ "number": "30",+ "name": "PB0/AIN0",+ "type": "bidirectional",+ "description": "Port B0 with ADC analog input 0; TIM1_CH1N is available as a remapped alternate function (AFR5)."+ },+ {+ "number": "31",+ "name": "PE7/AIN8",+ "type": "bidirectional",+ "description": "Port E7 with ADC analog input 8, slow-speed output (O1)."+ },+ {+ "number": "32",+ "name": "PE6/AIN9",+ "type": "bidirectional",+ "description": "Port E6 with ADC analog input 9, slow-speed output (O1)."+ },+ {+ "number": "33",+ "name": "PE5/SPI_NSS",+ "type": "bidirectional",+ "description": "Port E5 used as SPI master/slave select, slow-speed output (O1)."+ },+ {+ "number": "34",+ "name": "PC1/TIM1_CH1",+ "type": "bidirectional",+ "description": "Port C1 used as Timer 1 channel 1, high sink capable (HS) with speed O3."+ },+ {+ "number": "35",+ "name": "PC2/TIM1_CH2",+ "type": "bidirectional",+ "description": "Port C2 used as Timer 1 channel 2, high sink capable (HS) with speed O3."+ },+ {+ "number": "36",+ "name": "PC3/TIM1_CH3",+ "type": "bidirectional",+ "description": "Port C3 used as Timer 1 channel 3, high sink capable (HS) with speed O3."+ },+ {+ "number": "37",+ "name": "PC4/TIM1_CH4",+ "type": "bidirectional",+ "description": "Port C4 used as Timer 1 channel 4, high sink capable (HS) with speed O3."+ },+ {+ "number": "38",+ "name": "PC5/SPI_SCK",+ "type": "bidirectional",+ "description": "Port C5 used as SPI clock, high sink capable (HS) with speed O3."+ },+ {+ "number": "39",+ "name": "VSSIO_2",+ "type": "power_in",+ "description": "I/O ground."+ },+ {+ "number": "40",+ "name": "VDDIO_2",+ "type": "power_in",+ "description": "I/O power supply."+ },+ {+ "number": "41",+ "name": "PC6/SPI_MOSI",+ "type": "bidirectional",+ "description": "Port C6 used as SPI master out / slave in, high sink capable (HS) with speed O3."+ },+ {+ "number": "42",+ "name": "PC7/SPI_MISO",+ "type": "bidirectional",+ "description": "Port C7 used as SPI master in / slave out, high sink capable (HS) with speed O3."+ },+ {+ "number": "43",+ "name": "PG0/CAN_TX",+ "type": "bidirectional",+ "description": "Port G0 used as beCAN transmit (available on STM8S208xx devices only), slow-speed output (O1)."+ },+ {+ "number": "44",+ "name": "PG1/CAN_RX",+ "type": "bidirectional",+ "description": "Port G1 used as beCAN receive (available on STM8S208xx devices only), slow-speed output (O1)."+ },+ {+ "number": "45",+ "name": "PG2",+ "type": "bidirectional",+ "description": "Port G2 general-purpose I/O with slow-speed output (O1)."+ },+ {+ "number": "46",+ "name": "PG3",+ "type": "bidirectional",+ "description": "Port G3 general-purpose I/O with slow-speed output (O1)."+ },+ {+ "number": "47",+ "name": "PG4",+ "type": "bidirectional",+ "description": "Port G4 general-purpose I/O with slow-speed output (O1)."+ },+ {+ "number": "48",+ "name": "PI0",+ "type": "bidirectional",+ "description": "Port I0 general-purpose I/O with slow-speed output (O1)."+ },+ {+ "number": "49",+ "name": "PG5",+ "type": "bidirectional",+ "description": "Port G5 general-purpose I/O with slow-speed output (O1)."+ },+ {+ "number": "50",+ "name": "PG6",+ "type": "bidirectional",+ "description": "Port G6 general-purpose I/O with slow-speed output (O1)."+ },+ {+ "number": "51",+ "name": "PG7",+ "type": "bidirectional",+ "description": "Port G7 general-purpose I/O with slow-speed output (O1)."+ },+ {+ "number": "52",+ "name": "PE4",+ "type": "bidirectional",+ "description": "Port E4 general-purpose I/O with slow-speed output (O1)."+ },+ {+ "number": "53",+ "name": "PE3/TIM1_BKIN",+ "type": "bidirectional",+ "description": "Port E3 used as Timer 1 break input, slow-speed output (O1)."+ },+ {+ "number": "54",+ "name": "PE2/I2C_SDA",+ "type": "bidirectional",+ "description": "Port E2 used as I2C data; a true open-drain pin (P-buffer, weak pull-up and protection diode to VDD not implemented)."+ },+ {+ "number": "55",+ "name": "PE1/I2C_SCL",+ "type": "bidirectional",+ "description": "Port E1 used as I2C clock; a true open-drain pin (P-buffer, weak pull-up and protection diode to VDD not implemented)."+ },+ {+ "number": "56",+ "name": "PE0/CLK_CCO",+ "type": "bidirectional",+ "description": "Port E0 used as configurable clock output, high sink capable (HS) with speed O3."+ },+ {+ "number": "57",+ "name": "PD0/TIM3_CH2",+ "type": "bidirectional",+ "description": "Port D0 used as Timer 3 channel 2, high sink capable (HS) with speed O3; remap options are TIM1_BKIN (AFR3) and CLK_CCO (AFR2)."+ },+ {+ "number": "58",+ "name": "PD1/SWIM",+ "type": "bidirectional",+ "description": "Port D1 used as SWIM data interface, high sink capable (HS); it is in input pull-up during the reset phase and after internal reset release."+ },+ {+ "number": "59",+ "name": "PD2/TIM3_CH1",+ "type": "bidirectional",+ "description": "Port D2 used as Timer 3 channel 1, high sink capable (HS) with speed O3; remap option is TIM2_CH3 (AFR1)."+ },+ {+ "number": "60",+ "name": "PD3/TIM2_CH2",+ "type": "bidirectional",+ "description": "Port D3 used as Timer 2 channel 2, high sink capable (HS) with speed O3; remap option is ADC_ETR (AFR0)."+ },+ {+ "number": "61",+ "name": "PD4/TIM2_CH1/BEEP",+ "type": "bidirectional",+ "description": "Port D4 used as Timer 2 channel 1, high sink capable (HS) with speed O3; remap option is BEEP output (AFR7)."+ },+ {+ "number": "62",+ "name": "PD5/UART3_TX",+ "type": "bidirectional",+ "description": "Port D5 used as UART3 data transmit, slow-speed output (O1)."+ },+ {+ "number": "63",+ "name": "PD6/UART3_RX",+ "type": "bidirectional",+ "description": "Port D6 used as UART3 data receive; its default state is controlled by the ROM bootloader (pulled up during bootloader activation, returned to floating before bootloader exit)."+ },+ {+ "number": "64",+ "name": "PD7/TLI",+ "type": "bidirectional",+ "description": "Port D7 used as top level interrupt, slow-speed output (O1); remap option is TIM1_CH4 (AFR4), available on the 44-pin package only."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Package variant: the datasheet covers the 64-pin LQFP in 10x10 mm (0.5 mm pitch, Table 53, Figure 47; Figure 4 (LQFP64 pinout drawing) is garbled in the text extraction, so pin numbers were taken from t; PG0/CAN_TX (pin 43) and PG1/CAN_RX (pin 44) are beCAN pins available only on STM8S208xx devices. Thi"+ ],+ "pages_sent": 48,+ "cost_usd": 0.2413,+ "at": "2026-10-08T04:29:09"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588922204478451712",+ "pages": 117,+ "sha256": "7adeaa849cf9e22f",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 64,+ "described": 64,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "stm8s208rbt3.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 12,+ 12,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "b0c827bc5c05552175d28affe44a5bd2ab45c9c36efff6ff07a74cc449b13db4",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "stm8s208rbt3-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 12,+ 12,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "272125db26f6601346b7bcf5e3a69980e9233d494e51687980c29c875f6b8585",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}