main
Ray stm8s001j3m3: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) a1f66eb 18h ago
{
  "slug": "stm8s001j3m3",
  "version": "0.1.0",
  "type": "component",
  "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), SOP-8-150mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "stm8s001j3m3",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "stm8s001j3m3.kicad_sym",
    "stm8s001j3m3.kicad_mod",
    "stm8s001j3m3.glb",
    "stm8s001j3m3.step",
    "stm8s001j3m3.lbr",
    "docs/hero.png",
    "docs/stm8s001j3m3-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "component": {
    "mpn": "STM8S001J3M3",
    "manufacturer": "STMicroelectronics",
    "package": "SOP-8-150mil",
    "pin_count": 8,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588882484784746496",
    "parts": {
      "symbol": "stm8s001j3m3.kicad_sym",
      "footprint": "stm8s001j3m3.kicad_mod",
      "model_3d": "stm8s001j3m3-etched.glb",
      "model_3d_plain": "stm8s001j3m3.glb",
      "model_3d_step": "stm8s001j3m3-etched.step",
      "model_3d_step_plain": "stm8s001j3m3.step",
      "lbr": "stm8s001j3m3.lbr"
    },
    "distributor_links": {
      "lcsc": "C132355",
      "digikey": "497-17612-ND",
      "mouser": "511-STM8S001J3M3"
    },
    "distributor_check": {
      "checked_at": "2026-09-26T19:36:56Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "497-17612-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "511-STM8S001J3M3",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "PD6/AIN6/UART1_RX/PA1/OSCIN",
        "type": "bidirectional",
        "description": "Multiplexed I/O bonding PD6 and PA1 to one pad; default functions are Port D6 (high-sink push-pull, O3 speed), AIN6 analog input, UART1 receive data, and PA1 external HSE clock input (0-16 MHz); note PA1 is forced to weak-pull-up in halt/active-halt modes."
      },
      {
        "number": "2",
        "name": "VSS/VSSA",
        "type": "power_in",
        "description": "Digital ground and analog ground reference; both VSS and VSSA are bonded to this pin and must always be connected to the external power supply."
      },
      {
        "number": "3",
        "name": "VCAP",
        "type": "passive",
        "description": "External capacitor node for the internal 1.8 V main voltage regulator; requires CEXT 470-3300 nF with ESR ≤ 0.3 Ω at 1 MHz and ESL ≤ 15 nH connected between this pin and VSS."
      },
      {
        "number": "4",
        "name": "VDD/VDDA",
        "type": "power_in",
        "description": "Main power supply (2.95 V to 5.5 V) and analog supply/reference for the ADC; both VDD and VDDA are bonded to this pin and must always be connected to the external power supply."
      },
      {
        "number": "5",
        "name": "PA3/TIM2_CH3/PB5/I2C_SDA",
        "type": "bidirectional",
        "description": "Multiplexed I/O bonding PA3 (high-sink push-pull, O3 speed) and PB5 (true open-drain, no P-buffer or pull-up to VDD); default functions Port A3/B5 with TIM2_CH3 and I2C_SDA (up to 400 kHz); PA3 remappable to SPI_NSS [AFR1] or UART1_TX [AFR1+AFR0], PB5 remappable to TIM1_BKIN [AFR4]; VIN max on this pin is limited by the standard PA3 GPIO."
      },
      {
        "number": "6",
        "name": "PB4/I2C_SCL",
        "type": "bidirectional",
        "description": "Bidirectional I/O for PB4 as true open-drain (no P-buffer, no pull-up to VDD, no protection diode to VDD); default function I2C clock (up to 400 kHz); remappable to ADC external trigger [AFR4]."
      },
      {
        "number": "7",
        "name": "PC3/TIM1_CH3/PC4/CLK_CCO/TIM1_CH4/PC5/SPI_SCK",
        "type": "bidirectional",
        "description": "Multiplexed I/O bonding PC3, PC4, and PC5 to one pad (all high-sink push-pull, O3 speed); default functions Port C3/C4/C5 with TIM1_CH3, configurable clock output (CLK_CCO)/TIM1_CH4, and SPI_SCK; remappable to TLI [AFR3], AIN2 [AFR2], TIM2_CH1 [AFR0], TIM1_CH1N [AFR7], and TIM1_CH2N [AFR7]; push-pull configuration on any bonded GPIO affects all others on this pin."
      },
      {
        "number": "8",
        "name": "PC6/SPI_MOSI/PD1/SWIM/PD3/AIN4/TIM2_CH2/PD5/AIN5/UART1_TX",
        "type": "bidirectional",
        "description": "Multiplexed I/O bonding PC6, PD1, PD3, and PD5 to one pad (all high-sink; PD1 O4 speed, others O3); PD1 is the SWIM single-wire debug interface and defaults to input pull-up during and after reset; other functions include SPI_MOSI, TIM1_CH1 [AFR0], AIN4/AIN5 analog inputs, TIM2_CH2, ADC_ETR, and UART1_TX; a ~5 s firmware delay before reassigning SWIM function is strongly recommended to allow reprogram access."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.2",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.2",
        "primary_model": "claude-haiku-4-5-20251001",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-4-6",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Multiple GPIO pads bonded to single pins (6, 7, 8) create shared control; pull-up enabled on any GPI; PA1 special behavior in halt/active-halt modes: internal pull-up remains active and output state is ; PD1 maintains internal pull-up during reset phase affecting all bonded GPIO (PC6, PD3, PD5); SWIM fu"
        ],
        "pages_sent": 84,
        "cost_usd": 0.588,
        "at": "2026-09-26T19:36:38"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588882484784746496",
        "pages": 84,
        "sha256": "64ae6cc93f3e51bc",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "stm8s001j3m3.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "stm8s001j3m3-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "c34fdcb3c7698cde73fe0e07c0e75113b26cbd8859983cdada688057cf261d62",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}