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Contents

README

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STM32H743VIT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

STM32H743VIT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional GPIO port E pin 2, 5V tolerant I/O with high-speed low-voltage option, supports TRACECLK, SAI1_CK1, SPI4_SCK and multiple alternate functions including FMC address and LCD controller signals.
2 PE3 bidirectional GPIO port E pin 3, 5V tolerant I/O with high-speed low-voltage option, supports TRACED0, TIM15_BKIN, SAI1_SD_B and FMC address signals.
3 PE4 bidirectional GPIO port E pin 4, 5V tolerant I/O with high-speed low-voltage option, supports TRACED1, SAI1_D2, SPI4_NSS and DCMI/LCD control signals.
4 PE5 bidirectional GPIO port E pin 5, 5V tolerant I/O with high-speed low-voltage option, supports TRACED2, SAI1_CK2, SPI4_MISO and DCMI/LCD signals.
5 PE6 bidirectional GPIO port E pin 6, 5V tolerant I/O with high-speed low-voltage option, supports TRACED3, TIM1_BKIN2, SAI1_D1 and FMC/LCD signals.
6 VBAT power_in Battery backup supply voltage input, 1.2 to 3.6V for backup domain power supply.
7 PC13 bidirectional GPIO port C pin 13, 5V tolerant I/O, supports RTC_TAMP1/WKUP2 and external interrupt capability.
8 PC14-OSC32_IN bidirectional GPIO port C pin 14 / 32.768 kHz oscillator input, 5V tolerant I/O, functions as external oscillator input when configured.
9 PC15-OSC32_OUT bidirectional GPIO port C pin 15 / 32.768 kHz oscillator output, 5V tolerant I/O, functions as external oscillator output when configured.
10 VSS power_in Ground return path for digital circuits.
11 VDD power_in Main power supply voltage input, 1.62 to 3.6V, requires 100nF decoupling capacitor.
12 PH0-OSC_IN bidirectional GPIO port H pin 0 / main oscillator input, 5V tolerant I/O, supports external oscillator (4-48 MHz HSE).
13 PH1-OSC_OUT bidirectional GPIO port H pin 1 / main oscillator output, 5V tolerant I/O, supports external oscillator output.
14 NRST bidirectional Reset input pin with embedded weak pull-up resistor and Schmitt trigger, active low reset, 5V tolerant.
15 PC0 bidirectional GPIO port C pin 0, 5V tolerant analog/digital I/O, supports ADC123_INP10, DFSDM1_CKIN0 and FMC/LCD signals.
16 PC1 bidirectional GPIO port C pin 1, 5V tolerant I/O with high-speed low-voltage option, supports ADC123 inputs, DFSDM signals and SDMMC/ETH peripherals.
17 PC2_C bidirectional Analog-only GPIO port C pin 2, 3.3V tolerant, provides access to ADC3_INN1 and ADC3_INP0 when analog switch is open.
18 PC3_C bidirectional Analog-only GPIO port C pin 3, 3.3V tolerant, provides access to ADC3_INP1 when analog switch is open.
19 VSSA power_in Analog ground return path, must be connected to VSS externally.
20 VREF+ power_in Positive reference voltage for ADC, 1.62 to 3.6V, requires 100nF + 1µF decoupling capacitors.
21 VDDA power_in Analog power supply voltage, 1.62 to 3.6V for ADC/DAC/OPAMP/COMP operation, requires 100nF + 1µF capacitors.
22 PA0 bidirectional GPIO port A pin 0, 5V tolerant analog I/O, supports ADC1_INP16, WKUP0, timer and UART signals, DAC1_OUT1.
23 PA1 bidirectional GPIO port A pin 1, 5V tolerant I/O with high-speed low-voltage option, supports ADC1 inputs, timer and UART signals.
24 PA2 bidirectional GPIO port A pin 2, 5V tolerant analog I/O, supports ADC12_INP14, WKUP1, timer and UART signals.
25 PA3 bidirectional GPIO port A pin 3, 5V tolerant I/O with high-speed low-voltage option, supports ADC12_INP15, timer, UART and LCD signals.
26 VSS power_in Ground return path for digital circuits.
27 VDD power_in Main power supply voltage input, 1.62 to 3.6V, requires 100nF decoupling capacitor.
28 PA4 bidirectional GPIO port A pin 4, 3.3V tolerant analog I/O, supports ADC12_INP18, DAC1_OUT1, D1PWREN and SPI/SAI signals, internal pull-up/pull-down must be disabled for voltages above 3.3V.
29 PA5 bidirectional GPIO port A pin 5, 3.3V tolerant I/O with high-speed low-voltage option, supports ADC12 inputs, DAC1_OUT2, D2PWREN and SPI signals, internal pull-up/pull-down must be disabled for voltages above 3.3V.
30 PA6 bidirectional GPIO port A pin 6, 5V tolerant analog I/O, supports ADC12_INP3, SPI/timer signals and OPAMP1_VINM.
31 PA7 bidirectional GPIO port A pin 7, 3.3V tolerant analog I/O, supports ADC12 inputs, SPI signals, OPAMP1_VINM and Ethernet control.
32 PC4 bidirectional GPIO port C pin 4, 3.3V tolerant analog I/O, supports ADC12_INP4, OPAMP1_VOUT, COMP1_INM and Ethernet signals.
33 PC5 bidirectional GPIO port C pin 5, 3.3V tolerant analog I/O, supports ADC12 inputs, OPAMP1_VINM, COMP1_OUT and Ethernet signals.
34 PB0 bidirectional GPIO port B pin 0, 5V tolerant analog I/O, supports ADC12 inputs, OPAMP1_VINP, COMP1_INP and timer/UART signals.
35 PB1 bidirectional GPIO port B pin 1, 3.3V tolerant USB I/O, supports ADC12_INP5, COMP1_INM and timer signals.
36 PB2 bidirectional GPIO port B pin 2, 5V tolerant I/O with high-speed low-voltage option, supports COMP1_INP, RTC_OUT and SAI/SPI signals.
37 PE7 bidirectional GPIO port E pin 7, 3.3V tolerant I/O with high-speed low-voltage option, supports OPAMP2_VOUT, COMP2_INM and UART/QUADSPI signals.
38 PE8 bidirectional GPIO port E pin 8, 3.3V tolerant I/O with high-speed low-voltage option, supports OPAMP2_VINM, COMP2_OUT and UART/QUADSPI signals.
39 PE9 bidirectional GPIO port E pin 9, 3.3V tolerant I/O with high-speed low-voltage option, supports OPAMP2_VINP, COMP2_INP and UART/QUADSPI signals.
40 PE10 bidirectional GPIO port E pin 10, 5V tolerant I/O with high-speed low-voltage option, supports COMP2_INM and UART/QUADSPI signals.
41 PE11 bidirectional GPIO port E pin 11, 5V tolerant I/O with high-speed low-voltage option, supports COMP2_INP and SAI/SPI signals.
42 PE12 bidirectional GPIO port E pin 12, 5V tolerant I/O with high-speed low-voltage option, supports COMP1_OUT and SPI/SAI signals.
43 PE13 bidirectional GPIO port E pin 13, 5V tolerant I/O with high-speed low-voltage option, supports COMP2_OUT and SPI signals.
44 PE14 bidirectional GPIO port E pin 14, 5V tolerant I/O with high-speed low-voltage option, supports timer and SPI signals.
45 PE15 bidirectional GPIO port E pin 15, 5V tolerant I/O with high-speed low-voltage option, supports TIM1_BKIN and LCD/FMC signals.
46 PB10 bidirectional GPIO port B pin 10, 5V tolerant I/O with FM+ option, supports I2C2_SCL, timer, USART3 and QUADSPI signals.
47 PB11 bidirectional GPIO port B pin 11, 5V tolerant I/O with FM+ option, supports I2C2_SDA, timer, USART3 and QUADSPI signals.
48 VCAP power_in Internal voltage regulator stabilization capacitor pin, requires 2.2µF external capacitor with <100mΩ ESR.
49 VSS power_in Ground return path for digital circuits.
50 VDD power_in Main power supply voltage input, 1.62 to 3.6V, requires 100nF decoupling capacitor.
51 PB12 bidirectional GPIO port B pin 12, 5V tolerant USB I/O, supports I2C2_SMBA, SPI2, timer and FDCAN signals.
52 PB13 bidirectional GPIO port B pin 13, 5V tolerant USB I/O, supports SPI2, timer, FDCAN signals and OTG_HS_VBUS.
53 PB14 bidirectional GPIO port B pin 14, 5V tolerant USB I/O, supports USART1, SPI2, timer and SDMMC2 signals.
54 PB15 bidirectional GPIO port B pin 15, 5V tolerant USB I/O, supports USART1, SPI2, timer and SDMMC2 signals.
55 PD8 bidirectional GPIO port D pin 8, 5V tolerant I/O with high-speed low-voltage option, supports USART3, DFSDM and SPDIFRX signals.
56 PD9 bidirectional GPIO port D pin 9, 5V tolerant I/O with high-speed low-voltage option, supports USART3 and DFSDM signals.
57 PD10 bidirectional GPIO port D pin 10, 5V tolerant I/O with high-speed low-voltage option, supports USART3 and SAI signals.
58 PD11 bidirectional GPIO port D pin 11, 5V tolerant I/O with high-speed low-voltage option, supports I2C4_SMBA, USART3 and QUADSPI signals.
59 PD12 bidirectional GPIO port D pin 12, 5V tolerant I/O with FM+ option, supports I2C4_SCL, timer, USART3 and QUADSPI signals.
60 PD13 bidirectional GPIO port D pin 13, 5V tolerant I/O with FM+ option, supports I2C4_SDA and QUADSPI signals.
61 PD14 bidirectional GPIO port D pin 14, 5V tolerant I/O with high-speed low-voltage option, supports timer, SAI and UART8 signals.
62 PD15 bidirectional GPIO port D pin 15, 5V tolerant I/O with high-speed low-voltage option, supports timer, SAI and UART8 signals.
63 PC6 bidirectional GPIO port C pin 6, 5V tolerant I/O with high-speed low-voltage option, supports USART6, timer, SDMMC and LCD signals.
64 PC7 bidirectional GPIO port C pin 7, 5V tolerant I/O with high-speed low-voltage option, supports USART6, timer and SDMMC signals.
65 PC8 bidirectional GPIO port C pin 8, 5V tolerant I/O with high-speed low-voltage option, supports USART6, timer and SDMMC signals.
66 PC9 bidirectional GPIO port C pin 9, 5V tolerant I/O with FM+ option, supports MCO2, timer, I2C3 and SDMMC signals.
67 PA8 bidirectional GPIO port A pin 8, 5V tolerant I/O with FM+ option, supports MCO1, timer, I2C3 and UART signals.
68 PA9 bidirectional GPIO port A pin 9, 5V tolerant USB I/O, supports LPUART1, USART1, SPI2 and OTG_FS_VBUS.
69 PA10 bidirectional GPIO port A pin 10, 5V tolerant USB I/O, supports LPUART1, USART1 and FDCAN signals.
70 PA11 bidirectional GPIO port A pin 11, 5V tolerant USB I/O, supports LPUART1, USART1, UART4 and OTG_FS_DM.
71 PA12 bidirectional GPIO port A pin 12, 5V tolerant USB I/O, supports LPUART1, USART1, UART4 and OTG_FS_DP.
72 PA13 bidirectional GPIO port A pin 13 / JTAG test mode select, 5V tolerant I/O, supports JTMS-SWDIO debug interface.
73 VCAP power_in Internal voltage regulator stabilization capacitor pin, requires 2.2µF external capacitor with <100mΩ ESR.
74 VSS power_in Ground return path for digital circuits.
75 VDD power_in Main power supply voltage input, 1.62 to 3.6V, requires 100nF decoupling capacitor.
76 PA14 bidirectional GPIO port A pin 14 / JTAG test clock, 5V tolerant I/O, supports JTCK-SWCLK debug interface.
77 PA15 bidirectional GPIO port A pin 15 / JTAG data input, 5V tolerant I/O, supports JTDI and multiple peripheral signals.
78 PC10 bidirectional GPIO port C pin 10, 5V tolerant I/O with high-speed low-voltage option, supports USART3, UART4, SPI3 and QUADSPI signals.
79 PC11 bidirectional GPIO port C pin 11, 5V tolerant I/O with high-speed low-voltage option, supports USART3, UART4 and SPI3 signals.
80 PC12 bidirectional GPIO port C pin 12, 5V tolerant I/O with high-speed low-voltage option, supports USART3, UART5 and SPI3 signals.
81 PD0 bidirectional GPIO port D pin 0, 5V tolerant I/O with high-speed low-voltage option, supports UART4 and FDCAN signals.
82 PD1 bidirectional GPIO port D pin 1, 5V tolerant I/O with high-speed low-voltage option, supports UART4 and FDCAN signals.
83 PD2 bidirectional GPIO port D pin 2, 5V tolerant I/O with high-speed low-voltage option, supports UART5, SDMMC1 and DCMI signals.
84 PD3 bidirectional GPIO port D pin 3, 5V tolerant I/O with high-speed low-voltage option, supports USART2 and SPI2 signals.
85 PD4 bidirectional GPIO port D pin 4, 5V tolerant I/O with high-speed low-voltage option, supports USART2 and FDCAN signals.
86 PD5 bidirectional GPIO port D pin 5, 5V tolerant I/O with high-speed low-voltage option, supports USART2 and FDCAN signals.
87 PD6 bidirectional GPIO port D pin 6, 5V tolerant I/O with high-speed low-voltage option, supports USART2, SAI, SPI3 and SDMMC signals.
88 PD7 bidirectional GPIO port D pin 7, 5V tolerant I/O with high-speed low-voltage option, supports USART2, SPI1 and SDMMC signals.
89 PB3 bidirectional GPIO port B pin 3 / JTAG data output, 5V tolerant I/O, supports JTDO/TRACESWO debug interface and SPI/timer signals.
90 PB4 bidirectional GPIO port B pin 4 / JTAG test reset, 5V tolerant I/O, supports NJTRST debug and SPI/timer signals.
91 PB5 bidirectional GPIO port B pin 5, 5V tolerant I/O, supports I2C1_SMBA, SPI1 and FDCAN signals.
92 PB6 bidirectional GPIO port B pin 6, 5V tolerant I/O with FM+ option, supports I2C1_SCL, USART1 and FDCAN signals.
93 PB7 bidirectional GPIO port B pin 7, 5V tolerant I/O with FM+ option, supports I2C1_SDA, USART1 and FDCAN signals.
94 BOOT0 input Boot mode selection input pin, accepts 0 to 9V input, determines boot source at reset (flash or system memory).
95 PB8 bidirectional GPIO port B pin 8, 5V tolerant I/O with FM+ option, supports I2C1_SCL, timer, UART4 and FDCAN signals.
96 PB9 bidirectional GPIO port B pin 9, 5V tolerant I/O with FM+ option, supports I2C1_SDA, timer, UART4 and FDCAN signals.
97 PE0 bidirectional GPIO port E pin 0, 5V tolerant I/O with high-speed low-voltage option, supports LPTIM1/2, UART8 and FDCAN signals.
98 PE1 bidirectional GPIO port E pin 1, 5V tolerant I/O with high-speed low-voltage option, supports LPTIM1 and UART8 signals.
99 VSS power_in Ground return path for digital circuits.
100 VDD power_in Main power supply voltage input, 1.62 to 3.6V, requires 100nF decoupling capacitor.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

CAD (KiCad official)

  • Symbol: STM32H743VIT6
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: stm32h743vit6-etched.step / stm32h743vit6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32h743vit6.step / stm32h743vit6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (357 pp, sha256 9c74d2015445f7c3, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF