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STM32F103C8T6 - Arm Cortex-M3 MCU (Blue Pill)
Public Made by Adomby adom
STMicroelectronics mainstream Arm Cortex-M3 MCU. 72 MHz, 64 KB Flash, 20 KB SRAM, USB, CAN, LQFP-48. The workhorse Blue Pill microcontroller.
name: stm32f103c8t6-usage user-invocable: true description: "Use when placing the STM32F103C8T6 (Blue Pill MCU, LQFP-48) on a board: pin 1 orientation, decoupling, BOOT0 strapping, SWD debug header, crystal selection, USB pull-up, and pulling this page's symbol/footprint/3D into KiCad or Fusion. Triggers: put the STM32 on my board, F103 decoupling, blue pill pinout, BOOT0, SWD pins, stm32f103 crystal."
STM32F103C8T6 usage
Arm Cortex-M3 @ 72 MHz, 64 KB flash, 20 KB SRAM, LQFP-48. 2.0-3.6 V VDD (3.3 V typical). This skill covers board placement; electrical detail is in the page's datasheet (open the Datasheet viewer on the page).
Orientation and power
- Pin 1 (VBAT) is the dimple corner; the LQFP-48 footprint on this page has pin 1 at the top-left with the silkscreen dot. Double-check after any rotation: a 90-degree mistake on this package is the classic rework.
- Decouple EVERY VDD/VSS pair (pins 24/23, 36/35, 48/47) with 100 nF as close to the pin as routing allows, plus one 4.7 uF bulk near the part.
- VDDA/VSSA (pins 9/8) get their own 100 nF + 1 uF; feed VDDA through a ferrite or small R from 3.3 V if ADC noise matters. Tie VBAT to 3.3 V through nothing (or a coin cell + diode if you use the RTC).
- NRST (pin 7): 100 nF to ground; internal pull-up exists. Bring it to the debug header.
Strapping and debug
- BOOT0 (pin 44) to GND through 10 k for normal flash boot. BOOT0 high at reset enters the ROM UART bootloader on PA9/PA10. Do not float it.
- SWD is PA13 (SWDIO, pin 34) and PA14 (SWCLK, pin 37). Keep SWDIO/SWCLK/NRST/3V3/GND on a header; every programmer expects them.
Clocks and USB
- HSE: 8 MHz crystal (pins 5/6) with ~20 pF loads is the canonical choice; the PLL takes it to 72 MHz. LSE 32.768 kHz on pins 3/4 only if you need RTC.
- USB FS is PA12 (DP) / PA11 (DM). The F103 has NO internal DP pull-up: add 1.5 k from PA12 to 3.3 V (switchable via a GPIO-driven transistor if you want soft connect/disconnect).
- Most GPIOs are 5 V tolerant (FT) in digital modes; ADC inputs are limited to VDDA. Check the datasheet pin table before assuming.
Using this page's CAD assets
- Symbol:
STM32F103C8Tx.kicad_sym, footprint:STM32F103C8T6.kicad_mod, 3D:stm32f103c8t6.glb/.step, all in this package and on the page's Files tab. - KiCad/Fusion delivery: with Adom Desktop connected, ask the agent to send the symbol/footprint to KiCad (adom-desktop bridges) or use the page's per-file download URLs. The 3D model drops into the board view as-is (Z-up, mm scale).
---
name: stm32f103c8t6-usage
user-invocable: true
description: "Use when placing the STM32F103C8T6 (Blue Pill MCU, LQFP-48) on a board: pin 1 orientation, decoupling, BOOT0 strapping, SWD debug header, crystal selection, USB pull-up, and pulling this page's symbol/footprint/3D into KiCad or Fusion. Triggers: put the STM32 on my board, F103 decoupling, blue pill pinout, BOOT0, SWD pins, stm32f103 crystal."
---
# STM32F103C8T6 usage
Arm Cortex-M3 @ 72 MHz, 64 KB flash, 20 KB SRAM, LQFP-48. 2.0-3.6 V VDD
(3.3 V typical). This skill covers board placement; electrical detail is in
the page's datasheet (open the Datasheet viewer on the page).
## Orientation and power
- Pin 1 (VBAT) is the dimple corner; the LQFP-48 footprint on this page has
pin 1 at the top-left with the silkscreen dot. Double-check after any
rotation: a 90-degree mistake on this package is the classic rework.
- Decouple EVERY VDD/VSS pair (pins 24/23, 36/35, 48/47) with 100 nF as close
to the pin as routing allows, plus one 4.7 uF bulk near the part.
- VDDA/VSSA (pins 9/8) get their own 100 nF + 1 uF; feed VDDA through a
ferrite or small R from 3.3 V if ADC noise matters. Tie VBAT to 3.3 V
through nothing (or a coin cell + diode if you use the RTC).
- NRST (pin 7): 100 nF to ground; internal pull-up exists. Bring it to the
debug header.
## Strapping and debug
- BOOT0 (pin 44) to GND through 10 k for normal flash boot. BOOT0 high at
reset enters the ROM UART bootloader on PA9/PA10. Do not float it.
- SWD is PA13 (SWDIO, pin 34) and PA14 (SWCLK, pin 37). Keep
SWDIO/SWCLK/NRST/3V3/GND on a header; every programmer expects them.
## Clocks and USB
- HSE: 8 MHz crystal (pins 5/6) with ~20 pF loads is the canonical choice;
the PLL takes it to 72 MHz. LSE 32.768 kHz on pins 3/4 only if you need RTC.
- USB FS is PA12 (DP) / PA11 (DM). The F103 has NO internal DP pull-up: add
1.5 k from PA12 to 3.3 V (switchable via a GPIO-driven transistor if you
want soft connect/disconnect).
- Most GPIOs are 5 V tolerant (FT) in digital modes; ADC inputs are limited
to VDDA. Check the datasheet pin table before assuming.
## Using this page's CAD assets
- Symbol: `STM32F103C8Tx.kicad_sym`, footprint: `STM32F103C8T6.kicad_mod`,
3D: `stm32f103c8t6.glb` / `.step`, all in this package and on the page's
Files tab.
- KiCad/Fusion delivery: with Adom Desktop connected, ask the agent to send
the symbol/footprint to KiCad (adom-desktop bridges) or use the page's
per-file download URLs. The 3D model drops into the board view as-is
(Z-up, mm scale).