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STGAP2SICSNTR

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STMicroelectronics Isolators - Gate Drivers, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)stgap2sicsntrfactory-2.0.0extractor-text
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STGAP2SICSNTR

STMicroelectronics · Isolators - Gate Drivers · SO-8

STGAP2SICSNTR from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Driver logic supply voltage, recommended 3.1 V to 5.5 V vs. GND (absolute maximum 6.5 V), with a 100 nF plus 1 µF to 10 µF bypass placed close to the pin.
2 IN+ input Driver logic input, active high, with hysteresis thresholds of 0.33·VDD (typ) low and 0.66·VDD (typ) high, 100 kΩ pull-down, and a 20 to 40 ns deglitch filter.
3 IN- input Driver logic input, active low, with the same threshold, pull-down and deglitch characteristics as IN+; logic pins are rated 0 to 5.5 V vs. GND.
4 GND power_in Driver logic ground, the reference for VDD and the logic inputs IN+ and IN-.
5 VH power_in Gate driving positive supply referenced to GNDISO, with recommended maximum 26 V, absolute maximum 28 V, and UVLO turn-on threshold of 14.6 to 16.4 V.
6 GON output Source output (separated-output option, GON-GOFF part) that delivers up to 4 A source current at 25 °C and drives high to VH-0.125 V (typ) at 100 mA.
7 GOFF output Sink output (separated-output option, GON-GOFF part) that sinks up to 4 A at 25 °C and drives low to 120 mV (typ) at 100 mA, with a SafeClp active clamp of 2.3 V (typ).
8 GNDISO power_in Isolated ground for the gate driving section, the reference for VH and the GON/GOFF outputs.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SO-8
Category Power Management (PMIC)
Pins 8

CAD (KiCad official)

  • Symbol: STGAP2SICSNTR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: stgap2sicsntr-etched.step / stgap2sicsntr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stgap2sicsntr.step / stgap2sicsntr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (24 pp, sha256 3cdd11d41062afa9, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF