# STD16NF06T4

**STMicroelectronics** · MOSFETs · TO-252

STD16NF06T4 from STMicroelectronics, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate control terminal; Gate-Source voltage rating is ±20V and threshold voltage VGS(th) is 2V typical. |
| 2 | D | passive | Drain terminal, also electrically connected to the tab; rated VDS=60V, continuous ID=16A at TC=25°C. |
| 3 | S | passive | Source terminal of the N-channel power MOSFET. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-source voltage | VDS |  |  | 60 | V | VGS = 0V | 2 |
| Drain-gate voltage | VDGR |  |  | 60 | V | RGS = 20 kΩ | 2 |
| Gate-source voltage | VGS | -20 |  | 20 | V |  | 2 |
| Drain current (continuous) | ID |  |  | 16 | A | TC = 25°C | 2 |
| Drain current (continuous) | ID |  |  | 11 | A | TC = 100°C | 2 |
| Drain current (pulsed) | IDM |  |  | 64 | A |  | 2 |
| Total dissipation | PTOT |  |  | 40 | W | TC = 25°C | 2 |
| Peak diode recovery voltage slope | dv/dt |  |  | 10.5 | V/ns |  | 2 |
| Single pulse avalanche energy | EAS |  |  | 178 | mJ |  | 2 |
| Operating junction and storage temperature range | TJ, Tstg | -55 |  | 175 | °C |  | 2 |
| Maximum lead temperature for soldering | Tl |  |  | 275 | °C |  | 2 |
| Thermal resistance junction-case | RthJC |  |  | 3.75 | °C/W |  | 2 |
| Thermal resistance junction-ambient | RthJA |  |  | 100 | °C/W |  | 2 |
| Drain-source breakdown voltage | V(BR)DSS | 60 |  |  | V | ID = 250µA VGS = 0 | 3 |
| Zero gate voltage drain current | IDSS |  |  | 1 | µA | VDS = Max Rating | 3 |
| Zero gate voltage drain current | IDSS |  |  | 10 | µA | VDS = Max Rating TC=125°C | 3 |
| Gate body leakage current | IGSS | -100 |  | 100 | µA | VDS = 0 VGS = ±20V | 3 |
| Gate threshold voltage | VGS(th) | 2 |  |  | V | VDS = VGS ID = 250µA | 3 |
| Static drain-source on resistance | RDS(on) |  | 0.06 | 0.07 | Ω | VGS = 10V ID = 8A | 3 |
| Forward transconductance | gfs | 6 |  |  | S | VDS = 25V ID = 8A | 3 |
| Input capacitance | Ciss |  | 400 |  | pF | VDS = 15V, f = 1MHz, VGS = 0 | 3 |
| Output capacitance | Coss |  | 103 |  | pF | VDS = 15V, f = 1MHz, VGS = 0 | 3 |
| Reverse transfer capacitance | Crss |  | 41.5 |  | pF | VDS = 15V, f = 1MHz, VGS = 0 | 3 |
| Total gate charge | Qg |  | 14.1 |  | nC | VDD = 30 ID = 16A VGS = 10V | 3 |
| Gate-source charge | Qgs |  | 2.8 |  | nC | VDD = 30 ID = 16A VGS = 10V | 3 |
| Gate-drain charge | Qgd |  | 5.4 |  | nC | VDD = 30 ID = 16A VGS = 10V | 3 |
| Turn-on delay time | td(on) |  | 4 |  | ns | VDD = 30V, ID = 8A, RG = 4.7Ω, VGS = 10V | 3 |
| Rise time | tr |  | 15 |  | ns | VDD = 30V, ID = 8A, RG = 4.7Ω, VGS = 10V | 3 |
| Turn-off delay time | td(off) |  | 16 |  | ns | VDD = 30V, ID = 8A, RG = 4.7Ω, VGS = 10V | 3 |
| Fall time | tf |  | 5.5 |  | ns | VDD = 30V, ID = 8A, RG = 4.7Ω, VGS = 10V | 3 |
| Source-drain current | ISD |  |  | 16 | A |  | 4 |
| Source-drain current (pulsed) | ISDM |  |  | 64 | A |  | 4 |
| Forward on voltage | VSD |  |  | 1.5 | V | ISD = 8A VGS = 0 | 4 |
| Reverse recovery time | trr |  | 49 |  | ns | ISD = 16A, di/dt = 100A/µs, VDD = 20V, TJ = 150°C | 4 |
| Reverse recovery charge | Qrr |  | 78 |  | µC | ISD = 16A, di/dt = 100A/µs, VDD = 20V, TJ = 150°C | 4 |
| Reverse recovery current | IRRM |  | 3.2 |  | A | ISD = 16A, di/dt = 100A/µs, VDD = 20V, TJ = 150°C | 4 |

## CAD (KiCad official)

- Symbol: `STD16NF06T4`
- Footprint: `Package_TO_SOT_SMD:TO-252-2`
- 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files: `std16nf06t4-etched.step` / `std16nf06t4-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `std16nf06t4.step` / `std16nf06t4.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588942346423840768) (11 pp, sha256 `907c53843105aea3`, retrieved 2026-09-23, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-sonnet-5` (text+vision), consensus `claude-opus-4-8` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/std16nf06t4-datasheet.pdf)