component

SN74LVC2G86DCUR

Public Made by Adom

by adom

Texas Instruments Gates, VSSOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs sn74lvc2g86dcur: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
package.json Publish 0.2.0 · Ray 1mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
page.json sn74lvc2g86dcur: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 19h ago
README.md sn74lvc2g86dcur: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 16d ago
sn74lvc2g86dcur-etched.fit.json sn74lvc2g86dcur: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
sn74lvc2g86dcur-etched.glb sn74lvc2g86dcur: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
sn74lvc2g86dcur-etched.step sn74lvc2g86dcur: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
sn74lvc2g86dcur.glb Publish 0.1.0 · Ray 1mo ago
sn74lvc2g86dcur.kicad_mod Publish 0.1.0 · Ray 1mo ago
sn74lvc2g86dcur.kicad_sym Publish 0.1.0 · Ray 1mo ago
sn74lvc2g86dcur.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect and oval pad as a SQUARE EAGLE smd; this carries the real pad shape across (0 -> 8 rounded pads) and stops dropping geometry drawn on KiCad User.N layers. Attributes, connects, pads and the pin-1 marker are gated against decreasing and are unchanged. · Ray 1mo ago
sn74lvc2g86dcur.step Publish 0.1.0 · Ray 1mo ago

SN74LVC2G86DCUR

Texas Instruments · Gates · VSSOP-8

SN74LVC2G86DCUR from Texas Instruments, in a VSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Gate 1 input A. CMOS logic input; part of the first XOR gate (Y = A XOR B). VIH/VIL scale with VCC (e.g., VIH = 2 V min at VCC = 3.0-3.6 V). Input voltage tolerated up to 5.5 V regardless of VCC.
2 1B input Gate 1 input B. CMOS logic input; second input of the first XOR gate. 5.5 V tolerant input; unused inputs must be tied to VCC or GND.
3 2Y output Gate 2 output. CMOS push-pull output of the second XOR gate (Y = 2A XOR 2B). Drives ±24 mA at VCC = 3.3 V (±32 mA at 4.5 V; ±4 mA at 1.65 V).
4 GND power_in Ground reference (0 V) for the device. Continuous current through GND is limited to ±100 mA.
5 2A input Gate 2 input A. CMOS logic input; first input of the second XOR gate. 5.5 V tolerant.
6 2B input Gate 2 input B. CMOS logic input; second input of the second XOR gate. 5.5 V tolerant; tie unused inputs to VCC or GND.
7 1Y output Gate 1 output. CMOS push-pull output of the first XOR gate (Y = 1A XOR 1B). Drives ±24 mA at VCC = 3.3 V.
8 VCC power_in Positive supply input. Operating range 1.65 V to 5.5 V (data retention down to 1.5 V). Bypass with a local ceramic capacitor to GND. Absolute maximum 6.5 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VSSOP-8
Category Logic
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • SN74LVC2G86DCUR
  • SN74LVC2G86DCURG4
  • SN74LVC2G86DCURDCUT
  • SN74LVC2G86DCURDCTR
  • SN74LVC2G86DCURYZPR

CAD (KiCad official)

  • Symbol: SN74LVC2G86DCUR
  • Footprint: Package_SO:VSSOP-8_2.3x2mm_P0.5mm
  • 3D model: VSSOP-8 (KiCad packages3D, STEP)
  • 3D model files: sn74lvc2g86dcur-etched.step / sn74lvc2g86dcur-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvc2g86dcur.step / sn74lvc2g86dcur.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
sn74lvc2g86dcur.step 122 KB You want the bare part, or you mark your own boards.
sn74lvc2g86dcur-etched.step 3.0 MB You want the part with SN74LVC2G86DCUR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 716 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (19 pp, sha256 5e1ba8d249a642f9, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF