component

SCT2A10STER

Public Made by Adom

by adom

SCT DC-DC Converters, ESOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componentpmicsct2a10ster
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs sct2a10ster: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json sct2a10ster: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md sct2a10ster: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
sct2a10ster-etched.fit.json sct2a10ster: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sct2a10ster-etched.glb sct2a10ster: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sct2a10ster-etched.step sct2a10ster: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sct2a10ster.glb fix footprint: SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm -> SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm (3d refresh; body… · Ray
sct2a10ster.kicad_mod Publish 0.1.0 · Ray
sct2a10ster.kicad_sym Publish 0.1.0 · Ray
sct2a10ster.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
sct2a10ster.step fix footprint: SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm -> SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm (3d refresh; body… · Ray

SCT2A10STER

SCT · DC-DC Converters · ESOP-8

SCT2A10STER from SCT, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground return for the device. Must be tied to the PCB ground plane and connected together with the thermal pad for proper operation and thermal performance.
2 VIN power_in Input supply voltage, 4.5V to 85V operating range (absolute max 90V). Requires a local high-frequency bypass capacitor to GND placed as close as possible to the pin.
3 EN input Enable input with internal pull-up current source (~1-4µA). Pull below 1.1V to disable the converter; float or drive to VIN to enable. A resistor divider from VIN to GND on EN programs the input UVLO threshold (VEN_H≈1.21V, VEN_L≈1.05V).
4 RT input Switching frequency programming pin. A resistor from RT to GND sets the internal oscillator frequency from 300kHz to 800kHz (e.g. RRT=500kΩ ≈500kHz). An external clock may be applied directly to RT/CLK to synchronize the internal PLL; if the external clock stops, operation reverts to the resistor-programmed frequency.
5 FB input Inverting input of the transconductance error amplifier. Connect the tap of the external output-to-GND resistor divider here; the device regulates FB to VREF = 0.8V typical (±1%).
6 NC unconnected No internal connection. May be left floating or tied to GND.
7 BST passive Bootstrap supply for the high-side MOSFET gate driver. Connect a 0.1µF ceramic capacitor from BST to SW; the cap is recharged from an internal rail whenever the low-side MOSFET is on or SW is low. BOOT-SW absolute max is 6V.
8 SW output Switching node, output of the internal high-side/low-side MOSFET half-bridge. Connect to the external power inductor; also serves as the return for the bootstrap capacitor. Absolute max -1V to 90V.
9 Thermal Pad power_in Exposed thermal pad on the bottom of the ESOP-8 package. Primary heat dissipation path from the die. Must be soldered to the PCB ground plane and electrically connected to the GND pin for proper operation and optimized thermal performance.

Key specifications

Parameter Value
Manufacturer SCT
Package ESOP-8
Category PMIC
Pins 9

Ordering variants

Same part, different packaging or reel option.

  • SCT2A10STER

CAD (KiCad official)

  • Symbol: SCT2A10STER
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm
  • 3D model: ESOP-8 (KiCad packages3D, STEP)
  • 3D model files: sct2a10ster-etched.step / sct2a10ster-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sct2a10ster.step / sct2a10ster.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SCT datasheet (18 pp, sha256 864935163937d99b, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF