SCT2A10STER

{
 "schema": "adom.pads/1",
 "slug": "sct2a10ster",
 "footprint": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm",
 "generated_from": {
  "footprint": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm@sha256:5848244c5e72002e",
  "pins": "page.json:component.pins",
  "overrides": null
 },
 "pin1": {
  "pad": "1",
  "at": [
   -2.475,
   -1.905
  ],
  "corner": "top-left",
  "source": "silk-marker",
  "derived_from": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm@sha256:5848244c5e72002e"
 },
 "pad_count": 9,
 "symbol_pins": [
  "1",
  "2",
  "3",
  "4",
  "5",
  "6",
  "7",
  "8",
  "9"
 ],
 "paste_apertures": 4,
 "issues": [],
 "pads": [
  {
   "pad": "1",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "1",
   "name": "GND",
   "type": "power_in",
   "description": "Ground return for the device. Must be tied to the PCB ground plane and connected together with the thermal pad for proper operation and thermal performance.",
   "is_pin1": true,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "2",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "2",
   "name": "VIN",
   "type": "power_in",
   "description": "Input supply voltage, 4.5V to 85V operating range (absolute max 90V). Requires a local high-frequency bypass capacitor to GND placed as close as possible to the pin.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "3",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "3",
   "name": "EN",
   "type": "input",
   "description": "Enable input with internal pull-up current source (~1-4µA). Pull below 1.1V to disable the converter; float or drive to VIN to enable. A resistor divider from VIN to GND on EN programs the input UVLO threshold (VEN_H≈1.21V, VEN_L≈1.05V).",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "4",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "4",
   "name": "RT",
   "type": "input",
   "description": "Switching frequency programming pin. A resistor from RT to GND sets the internal oscillator frequency from 300kHz to 800kHz (e.g. RRT=500kΩ ≈500kHz). An external clock may be applied directly to RT/CLK to synchronize the internal PLL; if the external clock stops, operation reverts to the resistor-programmed frequency.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "5",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "5",
   "name": "FB",
   "type": "input",
   "description": "Inverting input of the transconductance error amplifier. Connect the tap of the external output-to-GND resistor divider here; the device regulates FB to VREF = 0.8V typical (±1%).",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "6",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "6",
   "name": "NC",
   "type": "unconnected",
   "description": "No internal connection. May be left floating or tied to GND.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "7",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "7",
   "name": "BST",
   "type": "passive",
   "description": "Bootstrap supply for the high-side MOSFET gate driver. Connect a 0.1µF ceramic capacitor from BST to SW; the cap is recharged from an internal rail whenever the low-side MOSFET is on or SW is low. BOOT-SW absolute max is 6V.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "8",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "8",
   "name": "SW",
   "type": "output",
   "description": "Switching node, output of the internal high-side/low-side MOSFET half-bridge. Connect to the external power inductor; also serves as the return for the bootstrap capacitor. Absolute max -1V to 90V.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "9",
   "kind": "smd",
   "shape": "rect",
   "at": [
    0.0,
    0.0
   ],
   "rot": 0.0,
   "size": [
    2.41,
    3.3
   ],
   "layers": [],
   "thermal": true,
   "pin": "9",
   "name": "Thermal Pad",
   "type": "power_in",
   "description": "Exposed thermal pad on the bottom of the ESOP-8 package. Primary heat dissipation path from the die. Must be soldered to the PCB ground plane and electrically connected to the GND pin for proper operation and optimized thermal performance.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  }
 ]
}