component
SCT2A10STER
Public Made by Adomby adom
SCT DC-DC Converters, ESOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
sct2a10ster: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
3cfc7af
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{
"schema_version": 1,
"type": "component",
"slug": "sct2a10ster",
"title": "SCT2A10STER",
"brief": "SCT DC-DC Converters, ESOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"pmic",
"sct2a10ster"
],
"component": {
"mpn": "SCT2A10STER",
"manufacturer": "SCT",
"package": "ESOP-8",
"pin_count": 9,
"category": "PMIC",
"subcategory": "DC-DC Converters",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/fdf504afb68bc475651e477005958c02.pdf",
"parts": {
"symbol": "sct2a10ster.kicad_sym",
"footprint": "sct2a10ster.kicad_mod",
"model_3d": "sct2a10ster-etched.glb",
"model_3d_plain": "sct2a10ster.glb",
"model_3d_step": "sct2a10ster-etched.step",
"model_3d_step_plain": "sct2a10ster.step",
"lbr": "sct2a10ster.lbr"
},
"distributor_links": {
"lcsc": "C509053"
},
"pins": [
{
"number": "1",
"name": "GND",
"type": "power_in",
"description": "Ground return for the device. Must be tied to the PCB ground plane and connected together with the thermal pad for proper operation and thermal performance."
},
{
"number": "2",
"name": "VIN",
"type": "power_in",
"description": "Input supply voltage, 4.5V to 85V operating range (absolute max 90V). Requires a local high-frequency bypass capacitor to GND placed as close as possible to the pin."
},
{
"number": "3",
"name": "EN",
"type": "input",
"description": "Enable input with internal pull-up current source (~1-4µA). Pull below 1.1V to disable the converter; float or drive to VIN to enable. A resistor divider from VIN to GND on EN programs the input UVLO threshold (VEN_H≈1.21V, VEN_L≈1.05V)."
},
{
"number": "4",
"name": "RT",
"type": "input",
"description": "Switching frequency programming pin. A resistor from RT to GND sets the internal oscillator frequency from 300kHz to 800kHz (e.g. RRT=500kΩ ≈500kHz). An external clock may be applied directly to RT/CLK to synchronize the internal PLL; if the external clock stops, operation reverts to the resistor-programmed frequency."
},
{
"number": "5",
"name": "FB",
"type": "input",
"description": "Inverting input of the transconductance error amplifier. Connect the tap of the external output-to-GND resistor divider here; the device regulates FB to VREF = 0.8V typical (±1%)."
},
{
"number": "6",
"name": "NC",
"type": "unconnected",
"description": "No internal connection. May be left floating or tied to GND."
},
{
"number": "7",
"name": "BST",
"type": "passive",
"description": "Bootstrap supply for the high-side MOSFET gate driver. Connect a 0.1µF ceramic capacitor from BST to SW; the cap is recharged from an internal rail whenever the low-side MOSFET is on or SW is low. BOOT-SW absolute max is 6V."
},
{
"number": "8",
"name": "SW",
"type": "output",
"description": "Switching node, output of the internal high-side/low-side MOSFET half-bridge. Connect to the external power inductor; also serves as the return for the bootstrap capacitor. Absolute max -1V to 90V."
},
{
"number": "9",
"name": "Thermal Pad",
"type": "power_in",
"description": "Exposed thermal pad on the bottom of the ESOP-8 package. Primary heat dissipation path from the die. Must be soldered to the PCB ground plane and electrically connected to the GND pin for proper operation and optimized thermal performance."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/fdf504afb68bc475651e477005958c02.pdf",
"pages": 18,
"sha256": "864935163937d99b",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 9,
"described": 9,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"pin1": {
"pad": "1",
"at": [
-2.475,
-1.905
],
"corner": "top-left",
"source": "silk-marker",
"derived_from": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm@sha256:5848244c5e72002e",
"mark": "drawn"
},
"models_3d": [
{
"file": "sct2a10ster.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.9,
4.9,
1.65
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "f1718a42c5ea007e8e2dd672ac39a1bb358ee4849bd53c42e21ce83e0e5df7a9",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "sct2a10ster-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.9,
4.9,
1.65
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "d037e5ce3d7feeaea75628dfb61f2c692bf055562c1b7605b0eba2f13b5996e4",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "SCT",
"Package": "ESOP-8",
"Category": "PMIC",
"Pins": "9"
}
},
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"sct2a10ster"
],
"discovery_pitch": "SCT2A10STER (SCT) component page with datasheet-verified CAD.",
"author": {
"name": "Ray"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"sct2a10ster.kicad_sym",
"sct2a10ster.kicad_mod",
"sct2a10ster.glb",
"sct2a10ster.step",
"sct2a10ster.lbr",
"docs/hero.png",
"docs/sct2a10ster-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"sct2a10ster-etched.step"
],
"variants": [
{
"mpn": "SCT2A10STER",
"kind": "packaging"
}
],
"updated_at": "2026-09-25T05:35:54.360Z"
}