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Name	Last commit message	Last updated
docs	Publish 0.1.0 · Ray	1d ago
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page.json	Set visibility: public · Ray	1d ago
pth08t230wad-etched.glb	pth08t230wad: factory component page (tier=lcsc) · Ray	1d ago
pth08t230wad-etched.step	pth08t230wad: factory component page (tier=lcsc) · Ray	1d ago
pth08t230wad-hero.glb	pth08t230wad: hero GLB from the etched model (keeps the MPN mark) · Ray	1d ago
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pth08t230wad.lbr	Publish 0.1.0 · Ray	1d ago
pth08t230wad.step	Publish 0.1.0 · Ray	1d ago
README.md	Initial commit: component/pth08t230wad · Ray	1d ago

PTH08T230WAD

Texas Instruments · DC-DC Power Modules · DIP-10

PTH08T230WAD from Texas Instruments, in a DIP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	SmartSync	input	Input that synchronizes the module switching frequency to an external clock; if unused it should be connected to GND (pin 3).
2	VI	power_in	Positive input voltage power node to the module, referenced to the common GND.
3	GND	power_in	Common ground for the VI and VO power connections and the 0 Vdc reference for the control inputs.
4	VO	power_out	Regulated positive power output with respect to GND.
5	+Sense	input	Sense input that lets the regulation compensate for voltage drop between the module and the load; for optimal accuracy it must be connected to VO close to the load.
6	-Sense	input	Sense input that lets the regulation compensate for voltage drop; for optimal accuracy it must be connected to GND (pin 3) very close to the module, within 10 cm.
7	VO Adjust	input	Output voltage adjust pin: a 0.05 W 1% resistor must be connected between this pin and -Sense (pin 6) to set the output above 0.69 V, over a set-point range of 0.69 V to 5.5 V; if left open the output defaults to its lowest value.
8	TurboTrans	input	Transient response adjust pin: a 1%, 0.05 W resistor between this pin and +Sense (pin 5) activates TurboTrans; leave open if unused, and external capacitance must never be connected to this pin unless the resistor is a 0 Ω short.
9	Track	input	Analog control input that makes the output follow an external voltage volt-for-volt from 0 V up to the set-point voltage, becoming active typically 20 ms after VI is applied; if unused it should be connected to VI.
10	Inhibit/UVLO	input	Open-collector/drain, negative-logic inhibit input referenced to GND: a low level disables the output (open-circuit leaves the module enabled), and a resistor from this pin to GND (pin 3) raises the input UVLO ON threshold.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	DIP-10
Category	Power Modules
Pins	10

CAD (KiCad official)

Symbol: PTH08T230WAD
Footprint: Package_DIP:DIP-10_W7.62mm
3D model: DIP-10 (KiCad packages3D, STEP)
3D model files: pth08t230wad-etched.step / pth08t230wad-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pth08t230wad.step / pth08t230wad.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (39 pp, sha256 feea6256e1032766, retrieved 2026-10-08, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF