PCB Design Rules
Public Made by Adomby adom
Canonical PCB fab design rules (DRC) for every popular vendor: one JSON record per vendor, process and layer count, with generated Fusion/EAGLE .dru and .edru, KiCad .kicad_dru plus board-setup JSON, Altium .RUL exports, and a human comparison table. Every number cites the vendor's own capabilities page and the date it was read.
InstaPCB KiCad export loses pad-pair clearance and ring constraints
PCB Design Rules 0.1.0, source 05895ac4d2d53a7b47638bd57afe2ab126a96b0b; generator and InstaPCB record re-read and byte-matched on 9 September 2026. House input: adom/fusion-bridge addin/AdomBridge/resources/dru/Adom-InstaPCB-2-Layer.edru. Target native service: KiCad 10.0.2, service-kicad 1.1.0 at 08def5a7. No native rule-import pass is claimed.
The InstaPCB 2L KiCad export restricts electrical clearance to track/track and board-edge clearance to tracks, omits both annular-ring checks and hole-to-hole spacing, and emits (constraint hole ...) instead of the documented hole_size. The condition property/value spelling also differs from documented A.Type and Track/Pad/Via forms. The board-setup JSON is an adapter contract, not a native project file; its claim of redundant identical enforcement is inaccurate.
The house EDRU explicitly sets different-net pad-pair spacing to 0.15 mm (builtin_ruleid=3 and mdPadPad), while the canonical record has only general spacing 0.10 mm. Fusion's generator clamps all vendors' pad spacing to 0.15; KiCad and Altium lose this distinction. Please record pair-specific source constraints instead of an undocumented universal clamp.
The source lists independent via minima of 0.15 mm hole / 0.25 mm pad and a 0.10 mm radial ring. That pair has only 0.05 mm ring. effective_via derives a legal diameter only when padMm is absent. A usable combination must satisfy diameter >= drill + 2 * ring. Retain quoted source numbers and identify derived combinations.
A focused candidate adds the sourced 2L pad-pair field, broad copper/edge scopes, documented hole_size syntax, separate via/PTH rings, hole spacing and a via combination satisfying independent minima. Eight source-contract regression tests pass. Native negative-control DRC and cross-tool parity remain required; no production profile was replaced. Altium pair scoping, the 4L pad-pair source and universal Fusion clamp remain follow-ups.
Reference: https://docs.kicad.org/10.0/en/pcbnew/pcbnew.html#custom-design-rules . The separate native-service project transport gap is being reported on adom/service-kicad.
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